upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 548

• Manufacturer Part Number: upd70f3402
• Description: 32-/16-bit Single-chip Microcontroller With Can Interface
• Manufacturer: Renesas Electronics Corporation.

Note: IPT: Information Processing Time
548
Sync segment
(Synchronization segment)
Prop segment
(Propagation segment)
Phase segment 1
(Phase buffer segment 1)
Phase segment 2
(Phase buffer segment 2)
SJW
(resynchronization Jump
Width)
Figure 16-19: Reference: Configuration of Data Bit Time Defined by CAN Specification
Reference: The CAN protocol specification defines the segments constituting the data bit time as
shown in Figure 16-19.
Segment name
Sync segment
1
Programmable to 1 to 8
or more great
Programmable to 1 to 8
Phase segment 1 or IPT-
Note
Programmable from 1
TQ to segment 1TQ to
4TQ, whichever is
smaller
, whichever greater
Segment length
Prop segment
Chapter 16 FCAN Controller
User’s Manual U16702EE3V2UD00
Data bit time(DBT)
Phase segment 1
This segment starts at the edge where the level
changes from recessive to dominant when hardware
synchronization is established.
This segment absorbs the delay of the output buffer,
CAN bus, and input buffer.
The length of this segment is set so that ACK is
returned before the start of phase segment 1.
Time of prop segment ≥ (Delay of output buffer) + 2 ×
(Delay of CAN bus) + (Delay of input buffer)
This segment compensates for an error in the data bit
time. The longer this segment, the wider the permis-
sible range but the slower the communication speed.
This width sets the upper limit of expansion or con-
traction of the phase segment during resynchroniza-
tion.
Sample point (SPT)
Phase segment 2
Description
SJW