upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 65

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upd70f3402

Manufacturer Part Number
upd70f3402
Description
32-/16-bit Single-chip Microcontroller With Can Interface
Manufacturer
Renesas Electronics Corporation.
Datasheet
(1)
EIPSW
EIPC
Interrupt status saving registers (EIPC and EIPSW)
EIPC and EIPSW are used to save the status when an interrupt occurs.
If a software exception or a maskable interrupt occurs, the contents of the program counter (PC)
are saved to EIPC, and the contents of the program status word (PSW) are saved to EIPSW
(these contents are saved to the NMI status saving registers (FEPC and FEPSW) if a non-maska-
ble interrupt occurs).
The address of the instruction next to the one of the instruction under execution, except some
instructions, is saved to EIPC when a software exception or a maskable interrupt occurs.
The current contents of the PSW are saved to EIPSW.
Because only one set of interrupt status saving registers is available, the contents of these regis-
ters must be saved by program when multiple interrupts are enabled.
Bits 31 to 26 of EIPC and bits 31 to 8 of EIPSW are reserved for future function expansion (these
bits are always fixed to 0).
The values of EIPC and EIPSW are restored to PC and PSW during execution of a RETI
instruction.
31
31
Figure 3-3: Interrupt Status Saving Registers (EIPC and EIPSW) Format
0
0
0
0
0 0 0 0
0 0 0 0
26 25
0
0
User’s Manual U16702EE3V2UD00
0 0 0 0
Chapter 3 CPU Function
0
0
0 0 0 0
(PC contents)
0
0
0 0 0 0
8
(PSW contents)
0
0
(x: Undefined)
(x: Undefined)
000000xxH
0xxxxxxxH
After reset
After reset
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