upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 706

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upd70f3402

Manufacturer Part Number
upd70f3402
Description
32-/16-bit Single-chip Microcontroller With Can Interface
Manufacturer
Renesas Electronics Corporation.
Datasheet
17.3.7 Maskable interrupt status flag
This flag controls the maskable interrupt’s operating state, and stores control information regarding
enabling or disabling of interrupt requests. An interrupt disable flag (ID) is incorporated, which is
assigned to the PSW.
Note: Interrupt disable flag (ID) function
706
This bit is set to 1 by the DI instruction and reset to 0 by the EI instruction. Its value is also
modified by the RETI instruction or LDSR instruction when referencing the PSW.
Non-maskable interrupt requests and exceptions are acknowledged regardless of this flag.
When a maskable interrupt is acknowledged, the ID flag is automatically set to 1 by hardware.
The interrupt request generated during the acknowledgement disabled period (ID = 1) is
acknowledged when the xxIFn bit of xxICn is set to 1, and the ID flag is reset to 0.
PSW
After reset: 00000021H
31
ID
0
1
Chapter 17 Interrupt/Exception Processing Function
Figure 17-13: Maskable Interrupt Status Flag Format
Maskable interrupt request signal acknowledgment enabled
Maskable interrupt request signal acknowledgment disabled (pending)
User’s Manual U16702EE3V2UD00
0
Specification of maskable interrupt servicing
8
NP EP
7
6
ID SAT CY OV
5
4
3
Note
2
S
1
Z
0

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