upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 267

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upd70f3402

Manufacturer Part Number
upd70f3402
Description
32-/16-bit Single-chip Microcontroller With Can Interface
Manufacturer
Renesas Electronics Corporation.
Datasheet
TPnOPT0
(6)
Caution:
Remark:
Symbol
The TPnCCS1 bit setting is valid only in the free-running mode.
The TPnCCS0 bit setting is valid only in the free-running mode.
Set (1)
Reset (0)
• The TPnOVF bit is reset when the 16-bit counter value overflows from FFFFH to 0000H in the free-
• An interrupt request signal (INTTPnOV) is generated as soon as TPnOVF bit is set (1).
• The TPnOVF bit is not cleared even when the TPnOVF bit and the TPnOPT0 register are read when
• The TPnOVF bit can be both read and written, but 1 cannot be written to the TPnOVF bit from the
TMPn option register 0 (TPnOPT0)
The TPnOPT0 register is an 8-bit register used to set the capture/compare operation and detect
overflow.
This register can be read and written in 8-bit or 1-bit units.
RESET input clears this register to 00H.
TPnCCS1
TPnCCS0
TPnOVF
running mode and the pulse width measurement mode.
The INTTPnOV signal is not generated in any mode other than free-running mode and the pulse width
measurement mode.
TPnOVF = 1.
CPU. Writing 1 has no influence on timer P operation.
Address: TP0OPT0: FFFFF595H, TP1OPT0: FFFFF5A5H
0
1
0
1
Rewrite TPnCCS1 and TPnCCS0 bits when TPnCE = 0 (the same value can be written
when TPnCE = 1.). If rewriting was mistakenly performed, clear TPnCE to 0 and then
set the bits again.
n = 0 to 3
7
0
Compare register selection
Capture register selection
Compare register selection
Capture register selection
Overflow occurrence
TPnOVF bit write or TPnCE = 0
TP2OPT0: FFFFF5B5H, TP3OPT0: FFFFF5C5H
6
0
Figure 7-10: TMPn Option Register 0 (TPnOPT0) Format
TPnCCS1 TPnCCS0
Chapter 7 16-Bit Timer/Event Counter P
5
User’s Manual U16702EE3V2UD00
TPnCCR1 register capture/compare selection
TPnCCR0 register capture/compare selection
4
Timer P overflow detection
3
0
2
0
1
0
TPnOVF
<0>
FFFFF5C5H
FFFFF595H
Address
to
R/W
R/W 00H
reset
After
267

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