L64105 LSI Logic Corporation, L64105 Datasheet - Page 86

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

4-4
Picture Start Code Detect Interrupt
SCR Compare Audio Interrupt
Reserved
Begin Active Video Interrupt
Register Descriptions
decoder samples the channel read pointers and
maintains the audio sync code read address and the
picture start code address. These addresses are the
current read pointers which are generally 48 addresses
higher than the picture start code and 8 addresses higher
than the audio sync code (due to the size of the top of
channel FIFOs). These can be related to the channel
buffer address stored at the time of the Packetized
Elementary Stream (PES) packet header when the
packet entered the system to allow correlating the packet
to the particular picture or audio frame contained in that
packet.
This bit is cleared when read. INTRn is also asserted
unless the host sets the mask bit.
This bit is set when the decoder detects a picture start
code in the bitstream. The bit is cleared when read.
INTRn is also asserted unless the host sets the mask bit.
This bit is set when the System Clock Reference (SCR)
Compare Audio value in Registers 20, 21, 22, and 23
(page
Compare Audio value is different from the main SCR
Compare value.
This bit is cleared when read. INTRn is also asserted
unless the host sets the mask bit.
Set this bit when writing to Register 1.
The Video Interface module sets this bit and asserts
INTRn (if not masked) at the beginning of active video.
This time is defined by the vertical blanking code (Vcode)
in the Start of Active Video/End of Active Video
(SAV/EAV) timing codes programmed into the Video
Interface.
This bit is cleared when read. INTRn is not asserted if the
host sets the mask bit.
4-16) matches the current SCR value. The SCR
1
2
3
4