L64105 LSI Logic Corporation, L64105 Datasheet - Page 324
L64105
Manufacturer Part Number
L64105
Description
Mpeg-2 Audio/video Decoder
Manufacturer
LSI Logic Corporation
Datasheet
1.L64105.pdf
(454 pages)
- Current page: 324 of 454
- Download datasheet (5Mb)
9.10 Pan and Scan Operation
9-32
Before switching to external OSD mode, the host loads the color palette
information into the CLUT by first setting the Clear OSD Palette Counter
bit in Register 265
then writing 32 consecutive bytes to the OSD Palette Write register
(Register 269,
the CLUT address pointer. Since the OSD Palette Read-Write register is
8 bits wide and the CLUT is 16 bits wide, the first write loads the most
significant byte and the second write loads the least significant byte of
the CLUT data at each address. The last write to the register is the least
significant byte of word 15 in the CLUT.
The EXT_OSD[3:0] inputs are sampled at a 13.5-MHz rate or every other
27-MHz system clock. For this reason, the recommended external OSD
frequency is 13.5 MHz. Running at a faster frequency results in lost
external pixels and running at a slower frequency results in replicated
pixels.
The external OSD inputs are double buffered in the L64105 but should
be supplied synchronous to the system clock. It is also important to keep
in mind that there will be a delay of four to five 27-MHz clock cycles (or
two pixels of video) between the time that the external OSD data is
supplied and the time it appears at the video output port. This latency
depends on the phase shift between the external dot clock and the
internal sampling clock.
Finally, note that OSD data is always mixed with the reconstructed video
in this mode. If any of the video is to be viewed, at least one of the
16 colors must be transparent (luma and chroma = 0). In general, eight
of the 16 colors may be programmed as transparent to allow one of the
four EXT_OSD inputs to act as an OSD blank function.
The display control subsystem supports horizontal pan and scan of an
image over the display area. The primary purpose for implementing pan
and scan is for viewing pictures that are too wide to be displayed in the
available screen area. An example of this situation is a wide-screen
image (16:9 aspect ratio) that is displayed on a standard 4:3 aspect ratio
screen without letterboxing.
Video Interface
page
(page
4-60). Writes to this register automatically increment
4-58) to reset the CLUT address pointer and
Related parts for L64105
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
Satellite Decoder Technical Manual 5/97
Manufacturer:
LSI Logic Corporation
Datasheet:
Part Number:
Description:
Satellite Receiver
Manufacturer:
LSI Logic Corporation
Datasheet:
Part Number:
Description:
Tuner/receiver Chipset
Manufacturer:
LSI Logic Corporation
Datasheet:
Part Number:
Description:
Tuner And Satellite Receiver Chipset Data Sheet 2/01
Manufacturer:
LSI Logic Corporation
Datasheet:
Part Number:
Description:
Smatv Qam Encoder
Manufacturer:
LSI Logic Corporation
Datasheet:
Part Number:
Description:
DVB Qam Modulator
Manufacturer:
LSI Logic Corporation
Datasheet:
Part Number:
Description:
Dvb-t Cofdm Demodulator Technical Manual 2/00
Manufacturer:
LSI Logic Corporation
Datasheet:
Part Number:
Description:
16-Bit HCMOS Multiplier / Accumulators
Manufacturer:
LSI Logic Corporation
Part Number:
Description:
Transport with Embedded CPU and Control
Manufacturer:
LSI Logic Corporation
Part Number:
Description:
32-Bit HCMOS IEEE Floating-Point Processor
Manufacturer:
LSI Logic Corporation
Part Number:
Description:
Controllers, Transport Controller with Embedded MIPS CPU (TR4101)
Manufacturer:
LSI Logic Corporation
Datasheet:
Part Number:
Description:
Variable-Length Video Shift Registers
Manufacturer:
LSI Logic Corporation