L64105 LSI Logic Corporation, L64105 Datasheet - Page 17

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

6.5
6.6
6.7
6.8
6.9
6.10
6.11
6.12
6.13
6.14
7.1
7.2
7.3
7.4
8.1
8.2
8.3
8.4
8.5
8.6
8.7
8.8
8.9
8.10
8.11
8.12
8.13
8.14
8.15
8.16
8.17
8.18
8.19
8.20
9.1
9.2
Contents
System Header Enable Bits
Video PES Header Enable Bits
Audio PES Header Enable Bits
Buffer Start and End Address Registers for ES Mode
Buffer Write and Read Pointer Registers in ES Mode
Number of Items in Buffers in ES Mode
SDRAM Addresses - Audio PES Header/System
Channel Buffer
Video PES Header Channel Buffer Registers
Compare DTS Register Bits and Fields
Video Channel Underflow Control Registers
NEC’s 16 Mbit Synchronous DRAM (Burst Length = 2)
Example NTSC SDRAM Allocation
Channel Buffer Architectures
Example NTSC SDRAM Allocation with Frame Store
(720 x 480)
Sequence Header Processing
Sequence Extension Processing
Sequence Display Extension Processing
Group Of Pictures Header Processing
Picture Header Processing
Picture Coding Extension Processing
Quant Matrix Extension Processing
Picture Display Extension Processing
Number of Frame Center Offsets
Copyright Extension Processing
All User Data Processing
Aux Data FIFO Registers
Aux Data FIFO Status
Auxiliary Data Layer ID Assignments
User Data FIFO Registers
User Data FIFO Status
User Data Layer ID Assignments
Frame Store Base Address Registers
Current Decode/Display Frame Bits Coding
Video Skip Frame Modes
Television Standard Select Field
Television Standard Select Default Values
6-11
6-12
6-12
6-13
6-14
6-14
6-18
6-25
6-28
6-29
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8-11
8-13
8-15
8-16
8-17
8-18
8-19
8-20
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8-22
8-22
8-24
8-32
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8-35
7-4
7-6
7-8
8-4
8-6
8-7
8-8
8-9
9-4
9-5
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