L64105 LSI Logic Corporation, L64105 Datasheet - Page 132
L64105
Manufacturer Part Number
L64105
Description
Mpeg-2 Audio/video Decoder
Manufacturer
LSI Logic Corporation
Datasheet
1.L64105.pdf
(454 pages)
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Figure 4.76
4-50
Read
Write
Register 236 (0x0EC)
7
Video Skip Frame Status [1:0]
Video Skip Frame Mode [1:0]
Video Continuous Skip Status
Register Descriptions
Reserved
Reserved
In one-time skip mode (see the description of bit 2 in this
register), the microcontroller clears these bits to let the
host know that the skip has been completed. In this
mode, the microcontroller skips through the bitstream for
one picture of the correct type (see Video Skip Frame
Mode following) without decoding it, and then starts
decoding one frame ahead in the bitstream.
These bits command the microcontroller to skip the next
I, P, or B frame according to the following table. When in
continuous skip mode (see the description of bit 2 in this
register), the host needs to reset this register to 0b00
(i.e., normal play) to stop the skip.
Skip Frame Bits
0b00
0b01
0b10
0b11
When set, indicates that the skip mode is continuous.
When cleared, indicates that the decoder is in single-skip
mode.
Skip Frame Mode
None (normal play)
Skip B frame
Skip P or B frame
Skip any frame
3
Skip Status
Continuous
Continuous
Skip Mode
Video
Video
2
Video Skip Frame
Video Skip Frame
1
Status [1:0]
Mode [1:0]
W [1:0]
R [1:0]
0
R 2
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