L64105 LSI Logic Corporation, L64105 Datasheet - Page 366

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

Table 10.11 ACLK Divider Select [3:0] Code Definitions
10-34
ACLK Divider
Select [3:0]
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7–0xB
0xC
0xD
0xE
0xF
ACLK Input
768 x Fs
768 x Fs
512 x Fs
384 x Fs
256 x Fs
768 x 48
512 x 48
Not Used
768 x 48
512 x 48
512 x 48
256 x 48
Audio Decoder Module
Case IIB: The Linear PCM bitstream with a sampling frequency of
96 kHz is selected but the external DAC does not support 96-kHz
sampling frequency. ACLK_48 must be available and it must be
selected. Set the Audio Decoder Mode Select field (Register 357,
bit [7:5],
48 kHz. Use the 0x0 through 0x4 divider code that matches the
ACLK_48 multiple.
Case III: The input sampling rate is 32 kHz but ACLK_32 is not
available. Select ACLK_48 and the 0xC through 0xF divider code
that matches the ACLK_48 multiple to derive the 32-kHz clocks from
ACLK_48.
Note:
S/P DIF
Interface BCLK
128 x Fs = ACLK
128 x Fs = ACLK
128 x Fs = ACLK
128 x Fs = ACLK
128 x Fs = ACLK
128 x 48 = ACLK
128 x 48 = ACLK
128 x 32 = ACLK
128 x 32 = ACLK
128 x 32 = ACLK
128 x 32 = ACLK
page
The CD bypass mode has a dedicated ACLK input pin
called CD_ACLK.
4-81) to 0b101 to decimate the output samples to
6
4
3
2
6
4
9
6
6
3
6
DAC
Interface BCLK
64 x Fs = ACLK
64 x Fs = ACLK
64 x Fs = ACLK
64 x Fs = ACLK
64 x Fs = ACLK
64 x 96 = ACLK
64 x 96 = ACLK
64 x 32 = ACLK
64 x 32 = ACLK
64 x 32 = ACLK
64 x 32 = ACLK
12 256 x Fs = ACLK
12 384 x Fs = ACLK
18 384 x 32 = ACLK
12 256 x 32 = ACLK
12 384 x 32 = ACLK
8
6
4
6
4
6
DAC A_ACLK
256 x Fs = ACLK
384 x Fs = ACLK
256 x Fs = ACLK
384 x 96 = ACLK
256 x 96 = ACLK
256 x 32 = ACLK
3
2
2
1
1
1
1
3
3
2
1