L64105 LSI Logic Corporation, L64105 Datasheet - Page 57

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

Table 3.4
(Sheet 2 of 3)
(Dec)
Addr
201
202
203
204
205
206
207
208
209
210
211
212
(Hex)
Addr
CC
CD
CA
CB
CE
CF
C9
D0
D1
D2
D3
D4
Memory Interface Registers (Cont.)
Bit(s)
2:0
7:3
7:0
7:0
2:1
5:4
7:6
2:1
5:3
7:6
1:0
3:2
5:4
7:6
7:0
7:0
7:0
7:0
7:0
7:0
0
3
0
Summary by Register
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
Default
Value
(Hex)
FF
FF
A2
00
80
00
00
01
00
0
0
0
0
1
1
0
0
0
0
–
–
–
0
Status/Command/Data
Host SDRAM Source Address [18:16]
Reserved
Block Transfer Count [7:0]
Block Transfer Count [15:8]
PLL Test
Reserved
Clk Out of Sync
Control for Programmable Delay Path 1
Control for Programmable Delay Path 2
Phase Locked Status
Internal Lock Counter State
Internal DRAM State
Reserved
Internal Phase State (3 cycles before)
Internal Phase State (2 cycles before)
Internal Phase State (1 cycle before)
Internal Phase State (current cycle)
Phase Detect Test High Freq [7:0]
Phase Detect Test High Freq [15:8]
Phase Detect Test Low Freq [7:0]
Phase Detect Test Low Freq [15:8]
VCO Test High Freq [7:0]
VCO Test High Freq [15:8]
Page
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4-43
4-43
4-43
4-44
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4-45
4-45
Ref.
3-15