L64105 LSI Logic Corporation, L64105 Datasheet - Page 445

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

status bits
stereo
stereo mode
stereo subbands
stereophonic digital programs
still images 8-46, 9-6,
STM
storage
storage devices
store header parameters
streams
internal clock synchronization
PCM FIFO buffer
play mode
RAM test
repeat frame
rip forward mode 4-52,
skip frame
soft mute
user data FIFO 4-18,
video packet error
intensity
Ms
channel data
frames
frames location
frames size
OSD areas
pack headers
PES headers 4-36,
unencoded serial input
video frames
A/V sync errors
asynchronous transfers
audio detection
audio ES channel buffer
audio ID
audio select enable 4-34,
audio transfers
changing IDs
channel interface and 1-3, 6-1,
data audio encoded
data video encoded
input formats
linear PCM samples
multichannel audio
pel components
preparser transport errors 6-26,
preparsing 6-9, 6-18,
B-8
formats
SDRAM addresses
elementary
MPEG-1 sequences
4-75
1-5
1-5
5-9
4-75
6-10
4-82
4-93
4-78
4-78
4-50
9-28
9-24
8-30
2-9
4-51
4-35
7-1
4-12
6-8
4-74
4-37
6-12
2-5
8-30
4-34
7-7
9-10
to
4-77
4-37
9-13
9-29
10-10
6-15
to
A-9
A-9
10-15
Index
6-24
8-22
8-19
6-14
9-26
2-9
4-53
6-4
6-16
to
6-20
6-10
10-29
9-15
to
to
6-25
4-44
6-2
6-18
6-27
subband samples 10-10,
subband synthesis
subbands (intensity stereo)
subframes
subpixel offset
subpixel values 9-20,
SWEn signal
sync active low bit
sync word detection
synchronization, losing
synchronized presentation units
synchronizing audio and video
synchronous DRAM See SDRAM
synchronous input multiplexer
synchronous mode 6-3,
synchronous transfers 2-6, 4-28, 4-29, 4-89,
synchronous valid signal timing diagram
SYSCLK signal
system channel buffer
system channel buffer map
system clock
System Clock Reference (SCR)
select bits
system syntax
video detection
video select enable 4-35,
video transfers 2-5,
IEC958 stream
description
usage overview
A/V data valid
A/V event interrupts 4-6,
A/V read compare
AC timing
audio code detect
audio sync errors 4-8,
channel buffering
channel constraints
hardware sync controls and
input timing 9-10,
out-of-sync conditions
PCM data
recovery bit
timing
description
SDRAM addresses
program streams
See also clock; device clock
block diagram
compare audio interrupt
compare interrupt
compare/capture mode
compare/capture mode bits 4-13,
11-15
10-31
2-8
2-12
11-14
4-12
10-16
2-8
2-12
4-65
4-3
2-12
5-7
2-6
6-2
10-30
4-35
4-67
10-12
9-10
10-5
6-19
7-7
9-11
4-5
9-22
4-4
4-21
6-16
6-18
10-5
6-6
2-6
6-5
10-12
10-5
10-5
4-14
4-74
4-4
6-17
4-7
6-9
6-8
A-11
2-10
4-3
5-6
to
5-6
5-8
6-6
6-5
IX-29