L64105 LSI Logic Corporation, L64105 Datasheet - Page 223
L64105
Manufacturer Part Number
L64105
Description
Mpeg-2 Audio/video Decoder
Manufacturer
LSI Logic Corporation
Datasheet
1.L64105.pdf
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6.3.8.4 Transport MPEG-2 Video
6.4 Channel Buffer Controller
Error Check Point: Start codes, zero packet length, and packet data
Description: If the ERRORn signal is asserted during the start code, the
whole packet is skipped and the Preparser resynchronizes to the next
start code.
If zero packet length is detected (transport mode is an exception), the
packet data until the next start code is stored. If the error occurs in the
start code search routine, the Packet Error Interrupt bit is set, INTRn is
asserted if not masked, error codes are injected, and then the Preparser
resynchronizes.
If the ERRORn signal is asserted during the packet data, the Packet
Error Interrupt bit is set, INTRn is asserted if the interrupt is not masked,
and sequence error start codes (0x0000.01B4) are substituted for the
errored data.
The Channel Buffer Controller manages the various buffers in the
external SDRAM. It reads and stores the start and end addresses of
each of the buffer areas. It maintains a write pointer for each buffer and
a read pointer for those that the internal microcontroller needs to access.
It updates the registers holding the read and write pointers. It also keeps
track of the number of 64-bit words in the Audio ES Channel Buffer and
the number of words or pictures in the Video ES Channel Buffer that
have not been read or decoded by the microcontroller and reports the
numbers to registers for access by the host. These functions are
described in
The Channel Buffer Controller has other features that aid the host in
system operation. These features include the ability to reset each of the
buffers individually, support for extracting an actual decode time stamp,
and control signals to handle cases of video channel underflow.
Channel Buffer Controller
Section 6.3.2, “Elementary Streams.”
6-27
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