L64105 LSI Logic Corporation, L64105 Datasheet - Page 273
L64105
Manufacturer Part Number
L64105
Description
Mpeg-2 Audio/video Decoder
Manufacturer
LSI Logic Corporation
Datasheet
1.L64105.pdf
(454 pages)
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Figure 8.4
TIME
Decode
Display
Note:
Names inside parentheses indicate frame store being used for decode or display.
F = First field.
L = Last field.
Chroma
Luma
(A1)
I0
Frame Store Organization in Normal Mode
Frame Store A1
(A2)
P3
Figure 8.4
display in interlaced mode. The reconstruction process is synchronized
with the display. For example, reconstruction of frame B2 from the
bitstream does not begin until the first field of frame B1 has been
displayed and display of the last field of B1 has begun. This is done to
process B frames using only one frame store (A3 in the example).
In trick modes, where it might be necessary to change the start
addresses of the frame stores “on the fly,” the start address of the frame
store being used for reconstruction is read in just before reconstruction
of the frame store is about to begin. The host should ensure that the start
address of the frame store is valid before the last field of the picture
being displayed starts to display.
Frame Store Modes
(A1)
I0
F
L
(A3)
B1
Chroma
assumes that encoded frame pictures are being decoded for
Luma
(A3)
B1
F
L
(A3)
B2
(VSYNC pulses)
Frame Store A2
(A3)
B2
F
L
(A1)
P6
(A2)
P3
F
Chroma
L
Luma
(A3)
B4
(A3)
B4
F
(A3)
Frame Store A3
L
B5
(A3)
B5
F
L
(A2)
P...
(A1)
P6
F
8-31
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