L64105 LSI Logic Corporation, L64105 Datasheet - Page 380

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

Table 11.8
1. Tc = 1/27 MHz = 37 ns.
Figure 11.9
AVALIDn/VVALIDn
11-14
Parameter
1
2
3
4
TOSn, ERRORn
CH_DATA[7:0]
Asynchronous Channel Write AC Timing
Description
AVALIDn/VVALIDn low pulse width
Data setup to AVALIDn/VVALIDn rising
Data hold from AVALIDn/VVALIDn rising
AVALIDn/VVALIDn rise to AVALIDn/VVALIDn rise
Asynchronous Channel Write Timing
Note: During asynchronous usage of the channel input, the DCK signal must be tied to VSS.
Table 11.9
1. Tc = 1/27 MHz = 37 ns.
Specifications
Parameter
1
2
3
4
5
1
2
Description
AVALIDn/VVALIDn hold from DCK rising
AVALIDn/VVALIDn setup to DCK falling
DCK cycle time
CH_DATA setup to DCK rising
CH_DATA hold from DCK rising
Synchronous AVALIDn/VVALIDn Signals AC Timing
3
4
0.5 Tc
3 Tc
Min
12
1
1
1
3 Tc
Max
Min
15
1
7
1
–
–
–
–
1
Units
Max
ns
ns
ns
ns
–
–
–
–
–
Units
ns
ns
ns
ns
ns