L64105 LSI Logic Corporation, L64105 Datasheet - Page 93
L64105
Manufacturer Part Number
L64105
Description
Mpeg-2 Audio/video Decoder
Manufacturer
LSI Logic Corporation
Datasheet
1.L64105.pdf
(454 pages)
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Figure 4.8
7
Reserved
Register 7 (0x007)
6
Reserved
Channel Status
Channel Start/Reset
Reserved
Host Interface Registers
Software
Reset
5
This separate control is provided for systems with priority
interrupts since this will allow the driver software to exit
the interrupt handler before completion and service
higher priority interrupts. While INTRn is still asserted,
the interrupt handler returns to the interrupt routine for
the L64105 when it is again the highest priority interrupt.
This bit indicates the status of the channel at any time.
At reset or power-up, this bit is cleared to indicate that the
channel is stopped. When the Channel Start command is
issued (host writes a 1 to this bit position), the L64105
microcontroller updates this bit to a 1 indicating that the
channel start command has been acknowledged and the
channel has started. When a Channel Reset command is
issued (host writes a 0 to this bit position) the L64105
microcontroller updates this bit to a 0 indicating
acknowledgment of the Channel Reset command and
that the channel is currently stopped.
Setting this bit starts the channel. Clearing it stops the
channel.
The default value of this bit is 1 and should NOT be
overwritten with 0.
SCR Pause
4
Stream Select [1:0]
3
2
Reserved
1
Start/Reset
Channel
Channel
Status
W
R
0
[7:1]
W 0
4-11
R 0
1
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