L64105 LSI Logic Corporation, L64105 Datasheet - Page 325

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

9.10.1 Host Controlled Pan and Scan
The pan and scan offset can either be controlled by the host or
automatically with values extracted from the bitstream. The host can set
or clear the Pan and Scan from Bitstream bit in Register 279
to specify the source of the pan and scan controls.
When the Pan and Scan from Bitstream bit is cleared, the host controls
pan and scan and must program the registers listed in
on bitstream parameters (horizontal size, vertical size, aspect ratio, etc.)
written into Auxiliary Data FIFO.
Table 9.9
The values in the three pan and scan offset register fields specify the
horizontal offset of the displayed image from the stored image. The Pan
and Scan Word Offset is the horizontal offset in 64-bit words (8 pixels).
The Pan and Scan Byte Offset selects the byte within the selected word.
The Pan and Scan 1/8 Pixel Offset changes the start phase of the
horizontal interpolation filter to shift the display in 1/8-pixel increments.
This requires the host to set the Horizontal Filter Enable bit and set or
clear the Horizontal Filter Select bit. The right edge of the displayed
image is set by the Main Reads per Line value. It tells the Display Control
Subsystem the number of 64-bit words (8 pixels) to read from the stored
image for each line starting at the offset.
Pan and Scan Operation
Parameter
Horizontal Pan and Scan Luma/Chroma
Word Offset [7:0]
Pan and Scan Byte Offset [2:0]
Pan and Scan 1/8 Pixel Offset [2:0]
Horizontal Filter Enable bit
Horizontal Filter Select bit
Horizontal Filter Scale [7:0]
Main Reads per Line [6:0]
Vertical Pan and Scan Line Offset [7:0]
Host Controlled Pan and Scan Registers
Register/Field Page Ref.
280
279 [5:3]
279 [2:0]
276 bit 1
276 bit 2
277
278
281
Table 9.9
(page
4-66
4-65
4-63
4-64
4-65
4-66
based
4-65)
9-33