L64105 LSI Logic Corporation, L64105 Datasheet - Page 142
L64105
Manufacturer Part Number
L64105
Description
Mpeg-2 Audio/video Decoder
Manufacturer
LSI Logic Corporation
Datasheet
1.L64105.pdf
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Figure 4.88
Figure 4.89
4-60
Reg. 266
Reg. 267
Reg. 268
7
Registers 266–268 (0x10A and 0x10C) Programmable Background
Y/Cb/Cr [7:0]
Register 269 (0x10D) OSD Palette Write [7:0]
7
When the Force Video Background Mode (bits 6 and 7 in Register 265)
is 0b10, the Y, Cb, and Cr values for the background are specified in
Registers 266, 267, and 268 respectively. The default values (i.e., values
in the register at startup/reset) are Y = 35, Cb = 212, and Cr = 114.
These values correspond to 75% Amplitude, 100% Saturated Blue.
This register is for writing the On-Screen Display (OSD) palette into the
Color Lookup Table (CLUT) in on-chip RAM for the External OSD Mode.
The host must disable the OSD Mode (Register 265,
the OSD Mix Weight into bits [3:0] of Register 274, clear the OSD palette
counter (Register 265, bit 3,
into this register. The palette should be written in Color 0 LSB, Color 0
MSB, Color 1 LSB,..., Color 15 MSB order. The internal OSD palette
counter is automatically incremented as each byte is written into the
register. After the palette is completed, the host can then change the
OSD Mode to external to start OSD.
Register Descriptions
OSD Palette Write [7:0]
Programmable Background Cb[7:0]
Programmable Background Cr[7:0]
Programmable Background Y[7:0]
W
page
R/W
R/W
R/W
4-59), and then write the color palette
page
4-58), write
0
0
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