L64105 LSI Logic Corporation, L64105 Datasheet - Page 418

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

algorithms decoding audio frames
alignment
alternate display systems
anchor chroma frame
anchor frame stores 8-30,
IX-2
audio PES header/system channel
audio PES header/system channel
audio sync code 4-4,
current read pointer
current S/P DIF read pointer
current write pointer
display start override
frame stores
host controlled testing
input select
MPEG-1 system channel buffer
OSD display areas
OSD storage formats 9-28,
picture start code 4-4,
Q table entries
S/P DIF read pointer
SDRAM column select
SDRAM incrementing
SDRAM read/writes
SDRAM row select
SDRAM source 4-42, 4-46,
SDRAM space allocation
SDRAM target 4-42, 4-46,
video ES channel buffer end 4-23,
video ES channel buffer start 4-22,
video ES channel buffer write
video PES header channel buffer end 4-24,
video PES header channel buffer start 4-24,
video PES header channel buffer write
programmable
store 1 base address bits
store 2 base address bits
buffer end 4-25,
buffer start 4-25,
audio ES channel buffer
video ES channel buffer
audio ES channel buffer
audio ES channel buffer
audio PES header/system channel buffer
video ES channel buffer
video PES header channel buffer
audio ES channel buffer
incrementing
nonincrementing
incrementing
overriding
assignment
assignment
4-12
2-3
8-32
9-15
9-11
8-25
8-25
4-56
5-15
5-16
9-26
2-7
7-8
5-10
4-4
5-15
7-8
4-59
Index
4-31
5-15
4-91
9-4
4-31
2-7
8-34
7-6
4-48
4-49
5-12
9-29
5-11
4-27
4-26
4-28
4-30
4-26
4-30
4-26
A-11
6-18
7-8
7-8
4-27
4-27
7-8
7-8
4-29
anchor luma frame
anchor pictures
ancillary data
arbitration priority
arbitration SDRAM
AREQn signal
AREQn status bit
ASDATA bits
ASDATA signal
ASn signal
aspect ratios 9-17,
asynchronous channel write timing
asynchronous mode
audio channel bypass data bits
audio channel overflow interrupt bit
audio clock
audio compression
audio CRC error interrupt bit
audio DAC interface
audio data 7-8,
size calculation
size example
store 1 base address bits
store 2 base address bits
user defined
asynchronous transfers 6-4,
channel bypass and
description
synchronous transfers and
usage overview
description
usage overview
description
external 4-84,
asynchronous transfers 6-4,
byte alignment
channel flushing
compressing
copyrighting
corrupted 4-8,
decoding
decompressing
direct writes
dual mono
encoding MPEG
ES channel buffer end addresses 4-24, 6-13,
ES channel buffer reset
ES channel buffer start addresses 4-23, 6-13,
ES channel buffer streams
ES channel buffer write pointer address
ES DTS address compare
frame time
See also audio decoder
2-3
2-10
10-12
A-10
4-82
7-7
2-5
2-5
2-9
2-3
A-10
4-74
4-17
8-46
2-9
A-7
10-10
7-10
10-33
7-6
10-5
4-10
4-12
1-2
7-10
7-6
9-18
A-7
10-29
10-5
4-80
10-12
6-3
1-4
6-8
4-20
4-8
4-48
4-48
4-29
6-7
6-20
6-5
4-17
11-14
11-14
4-7
4-26
7-8
7-8