L64105 LSI Logic Corporation, L64105 Datasheet - Page 139

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

Figure 4.82
Figure 4.83
Figure 4.84
Figure 4.85
Reg. 243
Reg. 244
MSB
LSB
7
7
7
Register 242 (0x0F2) Q Table Entry [7:0]
Register 243 and 244 (0x0F3 and 0x0F4) Microcontroller PC [11:0]
Register 245 (0x0F5) Revision Number [7:0]
Register 246 (0x0F6)
7
The Q table entry addressed in the previous register is available to the
host in this register.
Internal microcontroller Program Counter (PC). Note that the LSB should
always be read before the MSB to ensure correct capture of the
microcontroller PC value.
The value in this register is the revision number of the L64105.
Setting this bit causes the Video Decoder to start decode/reconstruction
of pictures. Clearing the bit stops the decode process but does not stop
the channel. The current status of decoding can be monitored by reading
the Decode Status Interrupt bit (Register 0, bit 0,
Microcontroller Registers
Reserved
Reserved
Revision Number [7:0]
Q Table Entry [7:0]
Microcontroller PC [7:0]
Read Only
Read Only
4
Read Only
3
Microcontroller PC [11:8]
Read Only
page
1
4-2).
Command
Start/stop
Decode
Write
0
0
0
0
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