L64105 LSI Logic Corporation, L64105 Datasheet - Page 301
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L64105
Manufacturer Part Number
L64105
Description
Mpeg-2 Audio/video Decoder
Manufacturer
LSI Logic Corporation
Datasheet
1.L64105.pdf
(454 pages)
- Current page: 301 of 454
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Figure 9.4
FCODE:
INIT = LINE 1
F = 0
ODD FIELD
FCODE = LINE 312
NEW FIELD = LINE 313
F=1
EVEN FIELD
LINE = 625
LINE = 1
Vertical Timing Vcodes and Fcodes for PAL
The last required parameter relating to the ITU-R BT.656 timing is the
Fcode fields of Registers 303 and 305
combined to specify the line number at which the field code bit changes.
In general, the Fcode changes one line prior to the new field. For NTSC
and PAL, this value is 265 and 312, respectively.
In the Internal OSD Mode, the OSD display area is obtained from the
header of each OSD display list. Unlike the main display areas, the
horizontal column positions represent pixel offsets from the horizontal
sync, as opposed to device clocks. In the External OSD Mode, the entire
display area is considered the OSD display area. When no mixing is
desired, it is up to the external OSD controller to select a transparent
color from the color palette.
Display Areas
Even field = 312 lines
Odd field = 313 lines
Active Video
Active Video
Blanking
Blanking
Blanking
(main)
(main)
VCODE (vertical blanking)
LINE = 1 - [V = 1]
V = 1
VCODE ZERO = LINE 21
MAIN START = LINE 23 - [V = 0]
V = 0
MAIN END = 310 - VCODE EVEN = 310 - [V = 0]
LINE 311 (VCODE EVEN PLUS 1 = 0) - [V = 1]
V = 1
LINE = 366 - [V = 0]
V = 0
LINE = 624 - [V = 1]
LINE = 625
(page
4-70). These bits are
9-9
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