L64105 LSI Logic Corporation, L64105 Datasheet - Page 234

• Manufacturer Part Number: L64105
• Description: Mpeg-2 Audio/video Decoder
• Manufacturer: LSI Logic Corporation

7.5 Memory Channel Buffer Allocation
7-6
SDRAM arbitration is controlled by the internal microcontroller of the
L64105. This microcontroller controls the functional units needed to
decode MPEG video syntax. It is critical for the decoder to carefully
control SDRAM access in order to ensure that the picture can be
decoded in the available processing time. The arbitration priority is:
1. MPEG Video Decoder and Channel Interface
2. Display Interface
3. Host Interface, block move, and DMA
4. Refresh
You must control SDRAM space allocation carefully to fit within a low-
cost memory solution. Many items must be placed within the SDRAM
address map including:
Refer to
shows typical sizes of buffers for an NTSC output.
Table 7.2
Memory Interface
Item
Video channel
Video Real-Time decode overflow 62,500 (33 ms at 15 Mbps)
Audio channel
Audio Real-Time decode overflow 4,096
Audio channel buffers
Video channel buffers
System header channel buffers
Video frame stores (usually 3)
OSD graphics objects
Chapter 6
Example NTSC SDRAM Allocation
for the operation of the channel buffers.
Size (bytes)
229,376
4,096
Table 7.2