UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 936

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

31.2 Debugging Without Using DCU
(RXDA0 and TXDA0), pins for CSIB0 (SIB0, SOB0, SCKB0, and HS (PCM0)), or pins for CSIB3 (SIB3, SOB3, SCKB3,
and HS (PCM0)) as the debug interface, without using the DCU.
31.2.1 Circuit connection examples
934
Figure 31-4. Circuit Connection Example When UARTA0/CSIB0/CSIB3 Is Used for Communication Interface
The following describes how to implement an on-chip debug function using MINICUBE2 with pins for UARTA0
Notes 1. Connect TXDA0/SOB0/SOB3 (transmit side) of the V850ES/JG3-L to RXD/SI (receive side) of the
Remark See Table 31-3 for the pins used when UARTA0, CSIB0, or CSIB3 is used for communication
2. This pin is not used during on-chip debugging.
3. During debugging, this pin is used as an input (unused) pin and can be used for its alternate
4. This connection is designed assuming that the RESET signal is output from an N-ch open-drain
5. The circuit enclosed by a dashed line is designed for flash self programming and controls the
interface.
target connector, and TXD/SO (transmit side) of the target connector to RXDA0/SIB0/SIB3 (receive
side) of the V850ES/JG3-L.
functions. A pull-down resistor of 100kΩ is connected to this pin in MINICUBE2.
buffer (output resistance: 100 Ω or less).
FLMD0 pin via a port. Use a port for inputting or outputting the high level. When flash self
programming is not performed, the pull-down resistance for the FLMD0 pin can be 1 to 10 kΩ.
RESET_IN
RESET_OUT
QB-MINI2
TXD/SO
RXD/SI
FLMD1
FLMD0
CLK
GND
VDD
SCK
Note 1
Note 1
Note 2
Note 3
Note 3
Note 4
HS
CHAPTER 31 ON-CHIP DEBUG FUNCTION
V
DD
User’s Manual U18953EJ5V0UD
10
kΩ
1 to 10
1 to 10
kΩ
1 to 10
V
V
DD
DD
kΩ
1
V
kΩ
kΩ
DD
3 to 10
1 to 10
kΩ
10
kΩ
kΩ
V
RESET signal
DD
100
Ω
V
V
RESET
TXDA0/SOB0/SOB3
RXDA0/SIB0/SIB3
SCKB0/SCKB3
HS (PCM0)
FLMD1
FLMD0
Port X
DD
SS
V850ES/JG3-L
Reset circuit
Note 5