UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 813

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

21.5.2 Debug trap
acknowledged.
A debug trap is an exception that occurs when the DBTRAP instruction is executed and can always be
(1) Operation
If a debug trap occurs, the CPU performs the following processing.
<1> Saves the current PC to DBPC.
<2> Saves the current PSW to DBPSW.
<3> Sets the PSW.NP, PSW.EP, and PSW.ID bits to 1.
<4> Sets the handler address (00000060H) for the debug trap to the PC and transfers control.
Caution The DBTRAP instruction is intended for debugging and is basically used by the debug tool.
The processing of a debug trap is shown below.
If the application uses this instruction while it is being executed by the debug tool, a
malfunction might occur.
CHAPTER 21 INTERRUPT SERVICING/EXCEPTION PROCESSING FUNCTION
CPU processing
Figure 21-13. Debug Trap Processing
User’s Manual U18953EJ5V0UD
DBPC
DBPSW
PSW.NP
PSW.EP
PSW.ID
PC
Exception processing
DBTRAP instruction
PC
PSW
1
1
1
00000060H
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