UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 367

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

8.4.2
TQ0CTL0.TQ0CE bit is set to 1, and an interrupt request signal (INTTQ0CC0) is generated each time the specified
number of edges have been counted. The timer output pins (TOQ00 to TOQ03) cannot be used. To use the TOQ01 to
TOQ03 pins in the external event count mode, be sure to set the TQ0CTL1.TQ0EEE bit to 1 in the interval timer mode
first. (For details, see 8.4.1 (3) Operation of interval timer based on input of external event count.)
TIQ00 pin
(external event
count input)
In the external event count mode, the valid edge of the external event count input is counted when the
Usually, the TQ0CCR1 to TQ0CCR3 registers are not used in the external event count mode.
Remarks 1. For how to set the TIQ00 pin, see Table 8-2 Pins Used by TMQ0 and Table 4-15 Settings When
External event count mode (TQ0MD2 to TQ0MD0 bits = 001)
2. For how to enable the INTTQ0CC0 interrupt signal, see CHAPTER 21 INTERRUPT SERVICING/
Pins Are Used for Alternate Functions.
EXCEPTION PROCESSING.
Figure 8-17. Configuration of Interval Timer in External Event Count Mode
detector
Edge
CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
TQ0CE bit
User’s Manual U18953EJ5V0UD
CCR0 buffer register
TQ0CCR0 register
16-bit counter
Clear
Match signal
INTTQ0CC0 signal
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