UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 209

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UPD70F3738GF-GAS-AX

Manufacturer Part Number
UPD70F3738GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3738GF-GAS-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3738GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
AD15 to AD0
Note This idle state (TI) does not depend on the BCC register settings.
Remarks 1. See Table 2-2 for the pin statuses in the bus hold mode.
Remarks 1. TASW (address-setup wait): Image of high-level width of T1 state expanded.
A21 to A16
CLKOUT
AD15 to AD0
HLDRQ
HLDAK
A21 to A16
ASTB
CLKOUT
RD
ASTB
WAIT
2. The broken lines indicate high impedance.
2. TAHW (address-hold wait): Image of low-level width of T1 state expanded.
3. The broken lines indicate high impedance.
RD
Figure 5-8. Multiplexed Bus Hold Timing (Bus Size: 16 Bits, 16-bit Access)
Figure 5-9. Address Wait Timing (Bus Size: 16 Bits, 16-bit Access)
T1
A1
T1
A1
T2
A1
D1
A1
T2
D1
CHAPTER 5 BUS CONTROL FUNCTION
T3
Undefined
Undefined
User’s Manual U18953EJ5V0UD
TI
Note
AD15 to AD0
A21 to A16
CLKOUT
TH
ASTB
WAIT
RD
TH
TASW
TH
TH
T1
A1
Undefined
Undefined
TI
A1
Note
TAHW
A2
T1
T2
D1
D2
T2
A2
T3
207

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