UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 408

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

406
<1> Starting counting
<2> Changing both the cycle and the duty
<3> Changing the cycle
TQ0CCR0 to TQ0CCR3 registers
(TQ0CKS0 to TQ0CKS2 bits)
Set the TQ0CCR0, TQ0CCR2,
Set the TQ0CCR1 register
Set the TQ0CCR0 register
Set the TQ0CCR1 register
and TQ0CCR3 registers
When changing both the cycle and the duty,
be sure to write to the TQ0CCR0, TQ0CCR2,
and TQ0CCR3 registers before writing to the
TQ0CCR1 register.
The TQ0CCR1 register must be written (the same
value) even when only changing the cycle setting.
Set up the registers
TQ0CTL0 register
TQ0CTL1 register
TQ0IOC0 register
TQ0IOC2 register
TQ0CE bit = 1
Remark
START
Figure 8-47. Timing and Processing of Operations in PWM Output Mode (2/2)
k = 1 to 3
m = 0 to 3
CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
Be sure to set up these
registers before setting
the TQ0CE bit to 1.
Counting starts
(TQ0CE bit = 1).
The TQ0CKS0 to TQ0CKS2
bits can be set here.
After setting the TQ0CCRm
registers, their values are
transferred to the CCRm
buffer registers when the
counter is cleared.
After setting the TQ0CCRm
registers, their values are
transferred to the CCRm
buffer registers when the
counter is cleared.
User’s Manual U18953EJ5V0UD
<4> Changing the duty
<5> Changing the duty of the TOQ02 and TOQ03
<6> Changing the duty of the TOQ01 output
<7> Stopping counting
Set the TQ0CCR1 register
Set the TQ0CCR1 register
Set the TQ0CCR1 register
Set the TQ0CCR2 and
Set the TQ0CCR2 and
The TQ0CCR1 register must be written (the
outputs
same value) even when only changing the duty
of the TOQ02 and TOQ03 outputs.
Only the TQ0CCR1 register has to be written when
only changing the duty of the TOQ01 output.
When changing the duty, be sure to write to the
TQ0CCR2 and TQ0CCR3 registers before writing
to the TQ0CCR1 register.
TQ0CCR3 registers
TQ0CCR3 registers
TQ0CE bit = 0
STOP
After setting the TQ0CCRm
registers, their values are
transferred to the CCRm
buffer registers when the
counter is cleared.
After setting the TQ0CCRm
registers, their values are
transferred to the CCRm
buffer registers when the
counter is cleared.
After setting the TQ0CCRm
registers, their values are
transferred to the CCRm
buffer registers when the
counter is cleared.
Disables counting.