UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 932

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

31.1.3 Mask function
listed below.
930
(7) FLMD0
(8) RESET
The reset, NMI, INTWDT2, WAIT, and HLDRQ signals can be masked.
The maskable signals in the integrated debugger (ID850QB) and the corresponding V850ES/JG3-L functions are
The flash self programming function is used to download data to the flash memory via the integrated debugger
(ID850QB). During flash self programming, the FLMD0 pin must be kept high. In addition, connect a pull-
down resistor to the FLMD0 pin.
The FLMD0 pin can be controlled in either of the following two ways.
<1> To control from MINICUBE
<2> To control from port
This is a system reset input pin. If the DRST pin is made invalid by the value of the OCDM.OCDM0 bit set by
the user program, on-chip debugging cannot be executed. Therefore, a reset is executed by MINICUBE,
using the RESET pin, to make the DRST pin valid (initialization).
For details, refer to the ID850QB Ver. 3.40 Integrated Debugger Operation User’s Manual (U18604E).
Connect the FLMD0 signal of MINICUBE to the FLMD0 pin.
In the normal mode, nothing is driven by MINICUBE (high impedance).
During a break, MINICUBE raises the FLMD0 pin to the high level when the download function of the
integrated debugger is executed. In other cases, the FLMD0 pin is in a high-impedance state.
Use this method when executing self-programming.
Connect any port of the device to the FLMD0 pin.
The same port as the one used by the user program to realize the flash self programming function may
be used.
Before executing a download, set the port pin connected to the FLMD0 pin to high level on the console
of the integrated debugger. Upon completion of the download, reset the port pin to low level.
NMI0
NMI2
STOP
HOLD
RESET
WAIT
Maskable Signals in Debugger (ID850QB)
CHAPTER 31 ON-CHIP DEBUG FUNCTION
Table 31-2. Mask Functions
User’s Manual U18953EJ5V0UD
NMI pin input
Non-maskable interrupt request signal
(INTWDT2) generation
Non-maskable
HLDRQ pin input
Reset signal generation by RESET pin input,
low-voltage detector, clock monitor, or
watchdog timer (WDT2) overflow
WAIT pin input
Corresponding V850ES/JG3-L Functions