UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 491

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

12.1 Functions
Watchdog timer 2 starts up in reset mode and with the overflow time set to internal oscillator clock = 2
watchdog timer 2 overflows, it generates the WDT2RES signal to trigger a reset.
Watchdog timer 2 is the default-start watchdog timer and starts up automatically immediately after a reset ends.
Watchdog timer 2 has the following features:
• It is the default-start watchdog timer
• It triggers the following operations when it overflows:
• Either the main clock, internal oscillator clock, or subclock can be input as the source clock.
→ Reset mode: Watchdog timer 2 triggers a reset when it overflows (by generating the WDT2RES signal).
→ Non-maskable interrupt request mode: Watchdog timer 2 triggers NMI servicing when it overflows (by
Notes 1. Watchdog timer 2 automatically starts in the reset mode following reset release.
generating the INTWDT2 signal)
2. For details of the non-maskable interrupt servicing that occurs due to the generation of the non-
When not using watchdog timer 2, either stop it operating before it triggers a reset, or clear it once
and stop it before the next overflow.
Also, write to the WDTM2 register for verification purposes only once, even if the default settings
(reset mode, loop detection time interval: 2
maskable interrupt request signal (INTWDT2), see 21.2.2 (2) From INTWDT2 signal.
CHAPTER 12 WATCHDOG TIMER 2
Note 2
Note 1
.
.
User’s Manual U18953EJ5V0UD
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) do not need to be changed.
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. When
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