UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 224

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<R>
<R>
6.4
6.4.1
Notes1.
Remark
222
Target Clock
Main clock oscillator (f
Subclock oscillator (f
CPU clock (f
Internal system clock (f
Main clock (in PLL mode, f
Peripheral clock (f
WT clock (main)
WT clock (sub)
WDT2 clock (internal oscillation)
WDT2 clock (main)
WDT2 clock (sub)
RTC clock (main)
RTC clock (sub)
The following table shows the operation status of each clock.
Operations
2. Be sure to set the PLLCTL.PLLON to 0.
3. Because V
4. Because V
5.
Operation of each clock
Lockup time
μ
√
×:
-:
:
Register Setting and
CPU
PD70F3792, 70F3793 only
)
Operation Status
Note5
Operating
Undefined
Stopped
Note5
XX
to f
XT
X
)
DD
DD
)
CLK
XX
/1,024)
is less than the guaranteed operating voltage, the register value is undefined.
is less than the guaranteed operating voltage, the operating status is undefined.
)
XX
)
×
√
×
×
×
×
×
√
×
×
√
×
√
Table 6-1. Operation Status of Each Clock
CHAPTER 6 CLOCK GENERATOR
CLK Bit = 0, MCK Bit = 0
√
Note1
√
√
×
×
×
√
√
√
×
√
×
√
User’s Manual U18953EJ5V0UD
√
√
√
×
√
√
√
√
√
√
√
√
√
√
√
√
×
×
√
×
√
√
√
×
√
√
PCC Register
×
√
×
×
×
×
×
√
√
×
√
×
√
CLS Bit = 1,
MCK Bit = 0
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
×
×
√
×
√
√
√
×
√
×
CLS Bit = 1,
MCK Bit = 1
Note2
×
√
√
√
×
×
√
√
×
√
×
√
×
Note2
×
√
×
×
×
×
√
√
×
√
×
√
-
-
-
-
-
-
-
-
-
-
-
-
Note3
Note4
Note4
Note4
Note4
Note4
Note4
Note4
Note4
Note4
Note4
Note4
√
√