UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 277

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

7.4.3
is the valid edge of the external trigger input signal, and starts incrementing when this trigger is detected. TMPn then
outputs a PWM waveform from the TOPn1 pin.
software trigger instead of the external trigger, a square wave that has one cycle of the PWM waveform as half its
cycle can also be output from the TOPn0 pin.
TIPn0 pin
In the external trigger pulse output mode, when the TPnCTL0.TPnCE bit is set to 1, TMPn waits for a trigger, which
Pulses can also be output by generating a software trigger instead of using the external trigger. When using a
Remarks 1. For how to set the TIPn0, TOPn0, and TOPn1 pins, see Table 7-2 Pins Used by TMPn and Table 4-
External trigger pulse output mode (TPnMD2 to TPnMD0 bits = 010)
selection
Count
clock
Remark
Software trigger
2. For how to enable the INTTPnCC0 and INTTPnCC1 interrupt signals, see CHAPTER 21
generation
TPnCE bit
15 Settings When Pins Are Used for Alternate Functions.
INTERRUPT SERVICING/EXCEPTION PROCESSING.
detector
Edge
Figure 7-26. Configuration of TMP in External Trigger Pulse Output Mode
n = 0 to 5
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
control
Count
start
User’s Manual U18953EJ5V0UD
CCR1 buffer register
CCR0 buffer register
TPnCCR0 register
TPnCCR1 register
16-bit counter
Clear
Match signal
Match signal
Transfer
Transfer
S
R
controller
(Toggle)
Output
controller
(RS-FF)
Output
INTTPnCC1 signal
INTTPnCC0 signal
TOPn1 pin
TOPn0 pin
275