UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 324

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

322
TPnCTL0
TPnCTL1
TPnOPT0
TPnIOC1
(a) TMPn control register 0 (TPnCTL0)
(b) TMPn control register 1 (TPnCTL1)
(c) TMPn I/O control register 1 (TPnIOC1)
(d) TMPn option register 0 (TPnOPT0)
(e) TMPn counter read buffer register (TPnCNT)
(f) TMPn capture/compare registers 0 and 1 (TPnCCR0 and TPnCCR1)
The value of the 16-bit counter can be read by reading this register.
These registers store the 16-bit counter value upon detection of the input of a valid edge to the
TIPn0/TIPn1 pin.
Remarks 1. TMPn I/O control register 0 (TPnIOC0) and TMPn I/O control register 2 (TPnIOC2) are not
TPnCE
0/1
0
0
0
2. n = 0 to 5
TPnEST
Figure 7-67. Register Settings in Pulse Width Measurement Mode
used in the pulse width measurement mode.
0
0
0
0
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
TPnCCS1
TPnEEE
0
0
0
0
TPnCCS0
0
0
0
0
User’s Manual U18953EJ5V0UD
TPnIS3
0/1
0
0
0
TPnCKS2 TPnCKS1 TPnCKS0
TPnMD2 TPnMD1 TPnMD0
TPnIS2
0/1
0/1
1
0
TPnIS1
0/1
0/1
1
0
TPnIS0
TPnOVF
0/1
0/1
0/1
0
1, 1, 0:
Pulse width
measurement mode
These bits select the
count clock.
0: Stop counting.
1: Enable counting.
These bits select the valid
edge of the TIPn0 pin input.
These bits select the valid
edge of the TIPn1 pin input.
Overflow flag