UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 309

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UPD70F3738GF-GAS-AX

Manufacturer Part Number
UPD70F3738GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3738GF-GAS-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3738GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
TPnCTL0
TPnIOC0
TPnCTL1
(a) TMPn control register 0 (TPnCTL0)
(b) TMPn control register 1 (TPnCTL1)
(c) TMPn I/O control register 0 (TPnIOC0)
Note The setting of these bits is invalid when the TPnCTL1.TPnEEE bit is 1.
Note The capture function of the TIPn0 pin cannot be used if the TPnCTL1.TPnEEE bit is 1.
Notes 1. The TOPn1 pin cannot be used when the TIPn1 pin is being used.
TPnCE
0/1
0
0
2. The TOPn0 pin cannot be used when the TIPn0 pin is being used.
TPnEST
Figure 7-55. Register Settings in Free-Running Timer Mode (1/2)
0
0
0
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
TPnEEE
0/1
0
0
Note
0
0
0
User’s Manual U18953EJ5V0UD
TPnOL1
0/1
Note 1
0
0
TPnCKS2 TPnCKS1 TPnCKS0
TPnOE1 TPnOL0
TPnMD2 TPnMD1 TPnMD0
0/1
0/1
Note 1
1
0/1
0/1
Note 2
0
TPnOE0
0/1
0/1
Note 2
1
0: Disable TOPn0 pin output.
1: Enable TOPn0 pin output.
Output level when TOPn0
pin is disabled:
0: Low level
1: High level
0: Disable TOPn1 pin output.
1: Enable TOPn1 pin output.
Output level when TOPn1 pin
is disabled:
0: Low level
1: High level
These bits select
the count clock
0: Stop counting.
1: Enable counting.
1, 0, 1:
Free-running timer mode
0: Operate TMPn on count
1: Increment TMPn based on
clock selected by using
TPnCKS0 to TPnCKS2 bits.
external event count input
signal.
Note
.
307

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