UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 926

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UPD70F3738GF-GAS-AX

Manufacturer Part Number
UPD70F3738GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3738GF-GAS-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3738GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
30.5.4 Flash functions
30.5.5 Pin processing
924
(1) FLMD0 pin
Caution Make sure that the FLMD0 pin is at 0 V immediately after a reset ends.
The FLMD0 pin is used to set the operation mode immediately after a reset ends and to protect the flash
memory from being written during self rewriting. It is therefore necessary to keep the voltage applied to the
FLMD0 pin at 0 V immediately after a reset ends and a normal operation is executed. It is also necessary to
apply a voltage of V
the memory is rewritten.
When self programming has been completed, the voltage on the FLMD0 pin must be returned to 0 V.
FlashInit
FlashEnv
FlashFLMDCheck
FlashStatusCheck
FlashBlockErase
FlashWordWrite
FlashBlockIVerify
FlashBlockBlankCheck
FlashSetInfo
FlashGetInfo
FlashBootSwap
Function Name
DD
RESET signal
FLMD0 pin
level to the FLMD0 pin during the self programming mode period via port control before
Figure 30-19. Mode Change Timing
Table 30-10. Flash Function List
Blank check of block
Self-programming library initialization
Flash environment start/end
FLMD pin check
Hardware processing execution status check
Block erase
Data write
Internal verification of block
Flash information setting
Flash information acquisition
Boot swap execution
CHAPTER 30 FLASH MEMORY
V
V
0 V
0 V
DD
DD
User’s Manual U18953EJ5V0UD
operation mode
Normal
Self programming mode
Outline
operation mode
Normal
Support

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