UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 326
UPD70F3738GF-GAS-AX
Manufacturer Part Number
UPD70F3738GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet
1.UPD70F3737GF-GAS-AX.pdf
(1071 pages)
Specifications of UPD70F3738GF-GAS-AX
Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3738GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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7.4.8
Remark a = 0, 1
324
TPnIOC0.TPnOLa Bit
(2) Using pulse width measurement mode
The following table shows the operations and output levels of the TOPn0 and TOPn1 pins.
(a) Clearing the overflow flag (TPnOVF)
Interval timer mode
External event count mode
External trigger pulse output mode
One-shot pulse output mode
PWM output mode
Free-running timer mode
Pulse width measurement mode
Timer output operations
Table 7-7. Truth Table of TOPn0 and TOPn1 Pins Under Control of Timer Output Control Bits
n = 0 to 5
0
1
The overflow flag (TPnOVF) can be cleared to 0 by reading the TPnOVF bit and, if its value is 1, either
clearing the bit to 0 by using the CLR1 instruction or by writing 8-bit data (with bit 0 as 0) to the TPnOPT0
register.
Operation Mode
TPnIOC0.TPnOEa Bit
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
Table 7-6. Timer Output Control in Each Mode
0
1
0
1
User’s Manual U18953EJ5V0UD
Square wave output
External trigger pulse output
One-shot pulse output
PWM output
Square wave output (only when compare function is used)
TPnCTL0.TPnCE Bit
TOPn1 Pin
×
0
1
×
0
1
Low-level output
Low-level output
Low level immediately before counting, high
level after counting is started
High-level output
High-level output
High level immediately before counting, low level
after counting is started
−
−
Square wave output
Level of TOPna Pin
TOPn0 Pin
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