UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 818

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

816
(2) External interrupt falling, rising edge specification register 3 (INTF3, INTR3)
Remark
The INTF3 and INTR3 registers are 8-bit registers that specify detection of the falling and rising edges of the
external interrupt pin (INTP7).
These registers can be read or written in 8-bit or 1-bit units.
Reset sets these registers to 00H.
Cautions 1. When switching from the port function to the external interrupt function (alternate
Caution Be sure to clear the INTF31 and INTR31 bits to 00 when these registers are not used for the
INTF31
For how to specify a valid edge, see Table 21-5.
INTR3
0
0
1
1
INTF3
After reset: 00H
2. The INTP7 pin and RXDA0 pin are alternate-function pins. When using the pin as the
INTP7 pin.
CHAPTER 21 INTERRUPT SERVICING/EXCEPTION PROCESSING FUNCTION
function), an edge might be detected. Therefore, set the INTF31 and INTR31 bits to 00,
and then specify the external interrupt function (PMC3.PMC31 bit = 1).
When switching from the external interrupt function to the port function, an edge might
be detected as well. Therefore, set the INTF31 and INTR31 bits to 00, and then specify the
port function (PMC3.PMC31 bit = 0).
RXDA0 pin, disable edge detection for the INTP7 alternate-function pin (clear the
INTF3.INTF31 bit and the INRT3.INTR31 bit to 0). When using the pin as the INTP7 pin,
stop UARTA0 reception (clear the UA0CTL0.UA0RXE bit to 0).
INTR31
0
0
0
1
0
1
R/W
0
0
Table 21-5. Valid Edge Specification
No edge detected
Rising edge
Falling edge
Both rising and falling edges
Address: INTF3 FFFFFC06H, INTR3 FFFFFC26H
User’s Manual U18953EJ5V0UD
0
0
0
0
Valid Edge Specification
0
0
0
0
INTR31
INTF31
INTP7
INTP7
0
0