UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 173
UPD70F3738GF-GAS-AX
Manufacturer Part Number
UPD70F3738GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet
1.UPD70F3737GF-GAS-AX.pdf
(1071 pages)
Specifications of UPD70F3738GF-GAS-AX
Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3738GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Notes 1.
Caution When using one of the P10/ANO0 and P11/ANO1 pins for the I/O port function and the other for D/A output (ANO0, ANO1), do so in an
P02
P03
P04
P05
P06
P10
P11
P30
P31
P32
P33
Function
Name
2. INTP7 and RXDA0 are alternate functions. When using the pin for RXDA0, disable edge detection for INTP7 (clear the INTF3.INTF31 bit and
μ
application where the port I/O level does not change during D/A output.
the INTR3.INTR31 bit to 0). When using the pin for INTP7, stop UARTA0 reception (clear the UA0CTL0.UA0RXE bit to 0).
PD70F3792, 70F3793 only
NMI
A21
INTP0
ADTRG
RTC1HZ
INTP1
RTCDIV
RTCCL
INTP2
DRST
INTP3
ANO0
ANO1
TXDA0
SOB4
RXDA0
INTP7
SIB4
ASCKA0
SCKB4
TIP00
TOP00
TIP01
TOP01
Name
Alternate Function
Note1
Note1
Note1
Note1
Input
Input
Input
Input
Input
Input
Output
Output
Input
Input
Input
Output
Output
Output
Output
Input
Input
Input
Input
I/O
Input
Output
Input
Output
I/O
P02 = Setting not required
P02 = Setting not required
P03 = Setting not required
P03 = Setting not required
P03 = Setting not required
P04 = Setting not required
P04 = Setting not required
P04 = Setting not required
P05 = Setting not required
P05 = Setting not required
P06 = Setting not required
P10 = Setting not required
P11 = Setting not required
P30 = Setting not required
P30 = Setting not required
P31 = Setting not required
P31 = Setting not required
P31 = Setting not required
P32 = Setting not required
P32 = Setting not required
P32 = Setting not required
P32 = Setting not required
P33 = Setting not required
P33 = Setting not required
Pn Register
Pnx Bit of
Table 4-15. Settings When Pins Are Used for Alternate Functions (1/7)
PM02 = Setting not required
PM02 = Setting not required
PM03 = Setting not required
PM03 = Setting not required
PM03 = Setting not required
PM04 = Setting not required
PM04 = Setting not required
PM04 = Setting not required
PM05 = Setting not required
PM05 = Setting not required
PM06 = Setting not required
PM10 = 1
PM11 = 1
PM30 = Setting not required
PM30 = Setting not required
PM31 = Setting not required
PM31 = Setting not required
PM31 = Setting not required
PM32 = Setting not required
PM32 = Setting not required
PM32 = Setting not required
PM32 = Setting not required
PM33 = Setting not required
PM33 = Setting not required
PMn Register
PMnx Bit of
PMC02 = 1
PMC02 = 1
PMC03 = 1
PMC03 = 1
PMC03 = 1
PMC04 = 1
PMC04 = 1
PMC04 = 1
PMC05 = 1
PMC05 = Setting not required
PMC06 = 1
PMC30 = 1
PMC30 = 1
PMC31 = 1
PMC31 = 1
PMC31 = 1
PMC32 = 1
PMC32 = 1
PMC32 = 1
PMC32 = 1
PMC33 = 1
PMC33 = 1
PMCn Register
PMCnx Bit of
−
−
PFCE03 = 0
PFCE03 = 0
PFCE03 = 1
PFCE04 = 0
PFCE04 = 0
PFCE04 = 1
PFCE32 = 0
PFCE32 = 0
PFCE32 = 1
PFCE32 = 1
PFCEn Register
PFCEnx Bit of
−
−
−
−
−
−
−
−
−
−
−
−
−
−
PFC02 = 0
PFC02 = 1
PFC03 = 0
PFC03 = 1
PFC03 = 1
PFC04 = 0
PFC04 = 1
PFC04 = 0
PFC30 = 0
PFC30 = 1
Note2, PFC31 = 0
Note2, PFC31 = 0
PFC31 = 1
PFC32 = 0
PFC32 = 1
PFC32 = 0
PFC32 = 1
PFC33 = 0
PFC33 = 1
PFCn Register
PFCnx Bit of
−
−
−
−
−
OCDM0 (OCDM) = 1
(Registers)
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