UPD70F3738GF-GAS-AX Renesas Electronics America, UPD70F3738GF-GAS-AX Datasheet - Page 744

• Manufacturer Part Number: UPD70F3738GF-GAS-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3738GF-GAS-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 84
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

19.16 Communication Operations
742
Next the following three operations are shown using flowcharts.
(1) Master operation in single master system
(2) Master operation in multimaster system
(3) Slave operation
The flowchart when using the V850ES/JG3-L as the master in a single master system is shown below.
This flowchart is broadly divided into the initial settings and communication processing. Execute the initial
settings at startup. If communication with the slave is required, prepare the communication and then execute
communication processing.
In the I
specifications when the bus takes part in a communication. Here, when data and clock are at a high level for a
certain period (1 frame), the V850ES/JG3-L takes part in a communication with bus released state.
This flowchart is broadly divided into the initial settings, communication waiting, and communication processing.
The processing when the V850ES/JG3-L loses in arbitration and is specified as the slave is omitted here, and
only the processing as the master is shown.
communication. Then, wait for the communication request as the master or wait for the specification as the
slave.
transmission/reception with the slave and the arbitration with other masters.
An example of when the V850ES/JG3-L is used as the slave of the I
When used as the slave, operation is started by an interrupt. Execute the initial settings at startup, then wait
for the INTIICn interrupt occurrence (communication waiting).
communication status is judged and its result is passed as a flag over to the main processing.
By checking the flags, necessary communication processing is performed.
Remark
2
C0n bus multimaster system, whether the bus is released or used cannot be judged by the I
The actual communication is performed in the communication processing, and it supports the
n = 0 to 2
User’s Manual U18953EJ5V0UD
CHAPTER 19 I
Execute the initial settings at startup to take part in a
2
C BUS
2
C0n bus is shown below.
When the INTIICn interrupt occurs, the
2
C bus