ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 94

• Manufacturer Part Number: ATMEGA64M1-15MZ
• Description: MCU AVR 64KB FLASH 3PSC 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64M1-15MZ

• Package / Case: 32-VQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Eeprom Size: 2K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Connectivity: CAN, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Lead Free Status / Rohs Status: Details

12.5
94
Compare Match Output Unit
Atmel ATmega16/32/64/M1/C1
The setup of the OC0x should be performed before setting the Data Direction Register for the
port pin to output. The easiest way of setting the OC0x value is to use the Force Output Com-
pare (FOC0x) strobe bits in Normal mode. The OC0x Registers keep their values even when
changing between Waveform Generation modes.
Be aware that the COM0x1:0 bits are not double buffered together with the compare value.
Changing the COM0x1:0 bits will take effect immediately.
The Compare Output mode (COM0x1:0) bits have two functions. The Waveform Generator
uses the COM0x1:0 bits for defining the Output Compare (OC0x) state at the next compare
match. Also, the COM0x1:0 bits control the OC0x pin output source.
plified schematic of the logic affected by the COM0x1:0 bit setting. The I/O Registers, I/O bits,
and I/O pins in the figure are shown in bold. Only the parts of the general I/O port control reg-
isters (DDR and PORT) that are affected by the COM0x1:0 bits are shown. When referring to
the OC0x state, the reference is for the internal OC0x Register, not the OC0x pin. If a system
reset occur, the OC0x Register is reset to “0”.
Figure 12-4. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OC0x) from the Waveform
Generator if either of the COM0x1:0 bits are set. However, the OC0x pin direction (input or
output) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direc-
tion Register bit for the OC0x pin (DDR_OC0x) must be set as output before the OC0x value is
visible on the pin. The port override function is independent of the Waveform Generation
mode.
The design of the Output Compare pin logic allows initialization of the OC0x state before the
output is enabled. Note that some COM0x1:0 bit settings are reserved for certain modes of
operation.
See “8-bit Timer/Counter Register Description” on page 101.
COMnx1
COMnx0
FOCn
clk
I/O
Waveform
Generator
D
D
D
PORT
DDR
OCnx
Q
Q
Q
1
0
Figure 12-4
OCnx
Pin
7647G–AVR–09/11
shows a sim-