ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 211

• Manufacturer Part Number: ATMEGA64M1-15MZ
• Description: MCU AVR 64KB FLASH 3PSC 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64M1-15MZ

• Package / Case: 32-VQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Eeprom Size: 2K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Connectivity: CAN, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Lead Free Status / Rohs Status: Details

17.4.6.4
17.4.7
17.4.7.1
17.4.7.2
17.4.7.3
7647G–AVR–09/11
UART Commands
Handling Data of LIN response
Data Handling
Rx Service
Tx Service
A FIFO data buffer is used for data of the LIN response. After setting all parameters in the LIN-
SEL register, repeated accesses to the LINDAT register perform data read or data write (c.f.
“Data Management” on page
Note that LRXDL[3..0] and LTXDL[3..0] are not linked to the data access.
Setting the LCMD[2] bit in LINENR register enables UART commands.
Tx Byte and Rx Byte services are independent as shown in
This combination of services is controlled by the LCMD[1..0] bits of LINENR register (c.f.
ure 17-5 on page
The FIFO used for LIN communication is disabled during UART accesses. LRXDL[3..0] and
LTXDL[3..0] values of LINDLR register are then irrelevant. LINDAT register is then used as
data register and LINSEL register is not relevant.
Once this service is enabled, the user is warned of an in-coming character by the LRXOK flag
of LINSIR register. Reading LINDAT register automatically clears the flag and makes free the
second stage of the buffer. If the user considers that the in-coming character is irrelevant with-
out reading it, he directly can clear the flag (see specific flag management described in
Section 17.6.2 on page
The intrinsic structure of the Rx service offers a 2-byte buffer. The fist one is used for serial to
parallel conversion, the second one receives the result of the conversion. This second buffer
byte is reached reading LINDAT register. If the 2-byte buffer is full, a new in-coming character
will overwrite the second one already recorded. An OVRERR error in LINERR register will
then accompany this character when read.
A FERR error in LINERR register will be set in case of framing error.
If this service is enabled, the user sends a character by writing in LINDAT register. Automati-
cally the LTXOK flag of LINSIR register is cleared. It will rise at the end of the serial
transmission. If no new character has to be sent, LTXOK flag can be cleared separately (see
specific flag management described in
There is no transmit buffering.
No error is detected by this service.
• Byte Transfer: the UART is selected but both Rx and Tx services are disabled,
• Rx Byte: only the Rx service is enable but Tx service is disabled,
• Tx Byte: only the Tx service is enable but Rx service is disabled,
• Full Duplex: the UART is selected and both Rx and Tx services are enabled.
208).
224).
221).
Atmel ATmega16/32/64/M1/C1
Section 17.6.2 on page
Table 17-1 on page
224).
209.
Fig-
211