ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 289

• Manufacturer Part Number: ATMEGA64M1-15MZ
• Description: MCU AVR 64KB FLASH 3PSC 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64M1-15MZ

• Package / Case: 32-VQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Eeprom Size: 2K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Connectivity: CAN, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Lead Free Status / Rohs Status: Details

24.7.10
7647G–AVR–09/11
Reading the Signature Row from Software
When an LPM instruction is executed within three cycles after the BLBSET and SPMEN bits
are set in the SPMCSR, the value of the Fuse Low byte (FLB) will be loaded in the destination
register as shown below. Refer to
ping of the Fuse Low byte.
Similarly, when reading the Fuse High byte, load 0x0003 in the Z-pointer. When an LPM
instruction is executed within three cycles after the BLBSET and SPMEN bits are set in the
SPMCSR, the value of the Fuse High byte (FHB) will be loaded in the destination register as
shown below. Refer to
Fuse High byte.
When reading the Extended Fuse byte, load 0x0002 in the Z-pointer. When an LPM instruction
is executed within three cycles after the BLBSET and SPMEN bits are set in the SPMCSR, the
value of the Extended Fuse byte (EFB) will be loaded in the destination register as shown
below. Refer to
Fuse byte.
Fuse and Lock bits that are programmed, will be read as zero. Fuse and Lock bits that are
unprogrammed, will be read as one.
To read the Signature Row from software, load the Z-pointer with the signature byte address
given in
LPM instruction is executed within three CPU cycles after the SIGRD and SPMEN bits are set
in SPMCSR, the signature byte value will be loaded in the destination register. The SIGRD
and SPMEN bits will auto-clear upon completion of reading the Signature Row Lock bits or if
no LPM instruction is executed within three CPU cycles. When SIGRD and SPMEN are
cleared, LPM will work as described in the Instruction set Manual.
Note:
Table 24-5.
Note:
Signature Byte
Device Signature Byte 1
Device Signature Byte 2
Device Signature Byte 3
RC Oscillator Calibration Byte
TSOFFSET Temp Sensor Offset
TSGAIN Temp Sensor Gain
Bit
Rd
Bit
Rd
Bit
Rd
ware is ready for a new operation.
All other addresses are reserved for future use.
Before attempting to set SPMEN it is important to test this bit is cleared showing that the hard-
Table 24-5 on page 289
Signature Row Addressing
FLB7
FHB7
Table 25-4 on page 298
7
7
7
–
Table 25-6 on page 299
FLB6
FHB6
6
6
6
–
FLB5
FHB5
and set the SIGRD and SPMEN bits in SPMCSR. When an
Table 25-4 on page 298
5
5
5
–
Atmel ATmega16/32/64/M1/C1
for detailed description and mapping of the Extended
FHB4
FLB4
4
4
4
–
for detailed description and mapping of the
FHB3
EFB3
FLB3
3
3
3
for a detailed description and map-
FHB2
EFB2
FLB2
2
2
2
Z-Pointer Address
0x0000
0x0002
0x0004
0x0001
0x0005
0x0007
FHB1
EFB1
FLB1
1
1
1
FHB0
EFB0
FLB0
0
0
0
289