ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 272

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ATMEGA64M1-15MZ

Manufacturer Part Number
ATMEGA64M1-15MZ
Description
MCU AVR 64KB FLASH 3PSC 32-VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA64M1-15MZ

Package / Case
32-VQFN
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Eeprom Size
2K x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
4K x 8
Program Memory Size
64KB (64K x 8)
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Connectivity
CAN, LIN, SPI, UART/USART
Core Size
8-Bit
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Lead Free Status / Rohs Status
 Details
21.3.1
21.4
21.4.1
272
DAC Register Description
Atmel ATmega16/32/64/M1/C1
DAC Voltage Reference
Digital to Analog Conversion Control Register – DACON
If the trigger signal is still set when the conversion completes, a new conversion will not be
started. If another positive edge occurs on the trigger signal during conversion, the edge will
be ignored.
Note that an interrupt flag will be set even if the specific interrupt is disabled or the Global
Interrupt Enable bit in SREG is cleared. A conversion can thus be triggered without causing an
interrupt. However, the interrupt flag must be cleared in order to trigger a new conversion at
the next interrupt event.
The reference voltage for the ADC (V
can be selected as either AV
AV
erated from the internal bandgap reference (V
the external AREF pin is directly connected to the DAC, and the reference voltage can be
made more immune to noise by connecting a capacitor between the AREF pin and ground.
V
a high impedant source, and only a capacitive load should be connected in a system.
If the user has a fixed voltage source connected to the AREF pin, the user may not use the
other reference voltage options in the application, as they will be shorted to the external volt-
age. If no external voltage is applied to the AREF pin, the user may switch between AV
2.56V as reference selection. The first DAC conversion result after switching reference voltage
source may be inaccurate, and the user is advised to discard this result.
The DAC is controlled via three dedicated registers:
Bit 7 – DAATE: DAC Auto Trigger Enable bit
Set this bit to update the DAC input value on the positive edge of the trigger signal selected
with the DACTS2-0 bit in DACON register.
Clear it to automatically update the DAC input when a value is written on DACH register.
Bit 6:4 – DATS2, DATS1, DATS0: DAC Trigger Selection bits
These bits are only necessary in case the DAC works in auto trigger mode. It means if DAATE
bit is set.
Bit
Read/Write
Initial Value
REF
• The DACON register which is used for DAC configuration
• DACH and DACL which are used to set the value to be converted.
CC
can also be measured at the AREF pin with a high impedant voltmeter. Note that V
is connected to the DAC through a passive switch. The internal 2.56V reference is gen-
DAATE
R/W
7
0
DATS2
R/W
6
0
CC
, internal 2.56V reference, or external AREF pin.
DATS1
R/W
5
0
REF
) indicates the conversion range for the DAC. V
DATS0
R/W
4
0
BG
) through an internal amplifier. In either case,
3
0
-
-
DALA
R/W
2
0
DAOE
R/W
1
0
DAEN
R/W
0
0
7647G–AVR–09/11
DACON
CC
REF
and
REF
is

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