ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 350

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ATMEGA64M1-15MZ

Manufacturer Part Number
ATMEGA64M1-15MZ
Description
MCU AVR 64KB FLASH 3PSC 32-VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA64M1-15MZ

Package / Case
32-VQFN
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Eeprom Size
2K x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
4K x 8
Program Memory Size
64KB (64K x 8)
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Connectivity
CAN, LIN, SPI, UART/USART
Core Size
8-Bit
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Lead Free Status / Rohs Status
 Details
Notes:
350
0x1B (0x3B)
0x1A (0x3A)
0x0E (0x2E)
0x0D (0x2D)
0x0C (0x2C)
0x0B (0x2B)
0x0A (0x2A)
0x19 (0x39)
0x18 (0x38)
0x17 (0x37)
0x16 (0x36)
0x15 (0x35)
0x14 (0x34)
0x13 (0x33)
0x12 (0x32)
0x11 (0x31)
0x10 (0x30)
0x0F (0x2F)
0x09 (0x29)
0x08 (0x28)
0x07 (0x27)
0x06 (0x26)
0x05 (0x25)
0x04 (0x24)
0x03 (0x23)
0x02 (0x22)
0x01 (0x21)
0x00 (0x20)
Address
1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
2. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these
3. Some of the status flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI
4. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O
5. These registers are only available on ATmega32/64M1. For other products described in this datasheet, these locations are
Atmel ATmega16/32/64/M1/C1
should never be written.
registers, the value of single bits can be checked by using the SBIS and SBIC instructions.
instructions will only operate on the specified bit, and can therefore be used on registers containing such status flags. The
CBI and SBI instructions work with registers 0x00 to 0x1F only.
Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The
ATmega16/32/64/M1/C1 is a complex microcontroller with more peripheral units than can be supported within the 64 loca-
tion reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the
ST/STS/STD and LD/LDS/LDD instructions can be used.
reserved.
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GPIOR2
GPIOR1
PORTE
PORTD
PORTC
PORTB
Name
PCIFR
DDRE
DDRD
DDRC
DDRB
TIFR1
TIFR0
PINE
PIND
PINC
PINB
GPIOR27
GPIOR17
PORTD7
PORTC7
PORTB7
PIND7
PINC7
PINB7
DDD7
DDC7
Bit 7
DDB7
GPIOR26
GPIOR16
PORTD6
PORTC6
PORTB6
PIND6
PINC6
PINB6
DDD6
DDC6
DDB6
Bit 6
GPIOR25
GPIOR15
PORTD5
PORTC5
PORTB5
PIND5
PINC5
PINB5
DDD5
DDC5
Bit 5
DDB5
ICF1
GPIOR24
GPIOR14
PORTD4
PORTC4
PORTB4
PIND4
PINC4
PINB4
DDD4
DDC4
DDB4
Bit 4
GPIOR23
GPIOR13
PORTD3
PORTC3
PORTB3
PCIF3
PIND3
PINC3
PINB3
DDD3
DDC3
DDB3
Bit 3
GPIOR22
GPIOR12
PORTE2
PORTD2
PORTC2
PORTB2
OCF1B
OCF0B
PIND2
PINC2
PCIF2
PINE2
DDD2
DDC2
PINB2
Bit 2
DDE2
DDB2
GPIOR21
GPIOR11
PORTD1
PORTC1
PORTE1
PORTB1
OCF1A
OCF0A
PCIF1
PINE1
PIND1
PINC1
PINB1
DDE1
DDD1
DDC1
DDB1
Bit 1
GPIOR20
GPIOR10
PORTE0
PORTD0
PORTC0
PORTB0
PCIF0
PINE0
PIND0
PINC0
PINB0
TOV1
TOV0
DDE0
DDD0
DDC0
DDB0
Bit 0
7647G–AVR–09/11
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