ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 213

• Manufacturer Part Number: ATMEGA64M1-15MZ
• Description: MCU AVR 64KB FLASH 3PSC 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64M1-15MZ

• Package / Case: 32-VQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Eeprom Size: 2K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Connectivity: CAN, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Lead Free Status / Rohs Status: Details

17.5.4
17.5.5
17.5.5.1
7647G–AVR–09/11
1) LBUSY
2) LBUSY
3) LBUSY
LIN bus
Configuration
Busy Signal
Busy Signal in LIN Mode
LCMD=Tx Header
BREAK
Depending on the mode (LIN or UART), LCONF[1..0] bits of the LINCR register set the con-
troller in the following configuration
Table 17-3.
The LIN configuration is independent of the programmed LIN protocol.
The listening mode connects the internal Tx LIN and the internal Rx LIN together. In this
mode, the TXLIN output pin is disabled and the RXLIN input pin is always enabled. The same
scheme is available in UART mode.
Figure 17-6. Listening Mode
LBUSY bit flag in LINSIR register is the image of the BUSY signal. It is set and cleared by
hardware. It signals that the controller is busy with LIN or UART communication.
Figure 17-7. Busy Signal in LIN Mode
Node providing the master task
Mode
UART
Field
LIN
HEADER
LCONF[1..0]
SYNC
Configuration Table versus Mode
00
01
10
11
00
01
10
11
Node providing neither the master task, neither a slave task
Field
b
b
b
b
b
b
b
b
LISTEN
Rx LIN
Tx LIN
internal
internal
PROTECTED
IDENTIFIER
LIDOK
Field
FRAME SLOT
(Table
Atmel ATmega16/32/64/M1/C1
Listening mode, 8-bit data, no parity & 1 stop-bit
1
0
No CRC field detection or transmission
17-3):
LCMD=Tx or Rx Response
LIN standard configuration (default)
8-bit data, even parity & 1 stop-bit
8-bit data, odd parity & 1 stop-bit
DATA-0
8-bit data, no parity & 1 stop-bit
Frame_Time_Out disable
Field
Listening mode
Configuration
Node providing a slave task
RESPONSE
RXLIN
TXLIN
DATA-n
Field
LTXOK or LRXOK
CHECKSUM
Field
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