ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 146

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ATMEGA64M1-15MZ

Manufacturer Part Number
ATMEGA64M1-15MZ
Description
MCU AVR 64KB FLASH 3PSC 32-VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA64M1-15MZ

Package / Case
32-VQFN
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Eeprom Size
2K x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
4K x 8
Program Memory Size
64KB (64K x 8)
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Connectivity
CAN, LIN, SPI, UART/USART
Core Size
8-Bit
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Lead Free Status / Rohs Status
 Details
14.9
14.9.1
14.9.1.1
146
PSC Input
Atmel ATmega16/32/64/M1/C1
PSC Input Configuration
Filter Enable
For detailed information on the PSC, please refer to Application Note ‘AVR138: PSC Cook-
book’, available on the Atmel web site.
Each module 0, 1 and 2 of PSC has its own system to take into account one PSC input.
According to PSC Module n Input Control Register
– PMICn” on page
Each block A or B is also configured by this PSC Module n Input Control Register (PMICn).
Figure 14-10. PSC Input Module
The PSC Input Configuration is done by programming bits in configuration registers.
If the “Filter Enable” bit is set, a digital filter of 4 cycles is inserted before evaluation of the sig-
nal. The disable of this function is mainly needed for prescaled PSC clock sources, where the
noise cancellation gives too high latency.
Important: If the digital filter is active, the level sensitivity is true also with a disturbed PSC
clock to deactivate the outputs (emergency protection of external component). Likewise when
used as fault input, PSC Module n Input A or Input B have to go through PSC to act on
PSCOUTn0/1/2 outputs. This way needs that CLK
nous Output Control bit (PAOCnA/B), PSCINn input can desactivate directly the PSC outputs.
Notice that in this case, input is still taken into account as usually by Input Module System as
soon as CLK
PSCINn
Analog
Comparator
n Output
PISELnA
(PISELnB)
PSC
0
1
PELEVnA /
(PELEVnB)
is running.
155.), PSCINn input can act has a Retrigger or Fault input.
PRFMnA3:0
(PRFMnB3:0)
PCAEnA
(PCAEnB)
Digital
Filter
CLK
PSC
PAOCnA
(PAOCnB)
PFLTEnA
(PFLTEnB)
0
1
CLK
CLK
2
4
PSC
PSC
Input
Processing
(retriggering ...)
PSC Core
(Counter,
Waveform
Generator, ...)
PSC
(See “PSC Module n Input Control Register
is running. So thanks to PSC Asynchro-
Control
of the
6 outputs
7647G–AVR–09/11
PSCOUTnA
PSCOUTnB

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