ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 90

• Manufacturer Part Number: ATMEGA64M1-15MZ
• Description: MCU AVR 64KB FLASH 3PSC 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64M1-15MZ

• Package / Case: 32-VQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Eeprom Size: 2K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Connectivity: CAN, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Lead Free Status / Rohs Status: Details

12. 8-bit Timer/Counter0 with PWM
12.1
12.1.1
90
Overview
Atmel ATmega16/32/64/M1/C1
Definitions
Timer/Counter0 is a general purpose 8-bit Timer/Counter module, with two independent Out-
put Compare Units, and with PWM support. It allows accurate program execution timing
(event management) and wave generation. The main features are:
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•
•
•
•
•
•
A simplified block diagram of the 8-bit Timer/Counter is shown in
placement of I/O pins, refer to
including I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit
locations are listed in the
The PRTIM0 bit in
Timer/Counter0 module.
Figure 12-1. 8-bit Timer/Counter Block Diagram
Many register and bit references in this section are written in general form. A lower case “n”
replaces the Timer/Counter number, in this case 0. A lower case “x” replaces the Output Com-
pare Unit, in this case Compare Unit A or Compare Unit B. However, when using the register
or bit defines in a program, the precise form must be used, i.e., TCNT0 for accessing
Timer/Counter0 counter value and so on.
Two Independent Output Compare Units
Double Buffered Output Compare Registers
Clear Timer on Compare Match (Auto Reload)
Glitch Free, Phase Correct Pulse Width Modulator (PWM)
Variable PWM Period
Frequency Generator
Three Independent Interrupt Sources (TOV0, OCF0A, and OCF0B)
Timer/Counter
OCRnx
TCCRnA
OCRnx
TCNTn
=
=
“Power Reduction Register” on page 42
“8-bit Timer/Counter Register Description” on page
direction
count
clear
“Pin Descriptions” on page
TOP
=
TCCRnB
Control Logic
Values
BOTTOM
Fixed
TOP
=
0
clk
Tn
Generation
Waveform
Generation
Waveform
Clock Select
( From Prescaler )
10. CPU accessible I/O Registers,
Detector
Edge
must be written to zero to enable
Figure
12-1. For the actual
OCnB
(Int.Req.)
OCnB
OCnA
(Int.Req.)
TOVn
(Int.Req.)
OCnA
Tn
101.
7647G–AVR–09/11