ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 183

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ATMEGA64M1-15MZ

Manufacturer Part Number
ATMEGA64M1-15MZ
Description
MCU AVR 64KB FLASH 3PSC 32-VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA64M1-15MZ

Package / Case
32-VQFN
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Eeprom Size
2K x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
4K x 8
Program Memory Size
64KB (64K x 8)
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Connectivity
CAN, LIN, SPI, UART/USART
Core Size
8-Bit
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Lead Free Status / Rohs Status
 Details
16.7
16.7.1
16.7.2
7647G–AVR–09/11
Error Management
Fault Confinement
Error Types
The CAN channel may be in one of the three following states:
For fault confinement, a transmit error counter (TEC) and a receive error counter (REC) are
implemented. BOFF and ERRP bits give the information of the state of the CAN channel. Set-
ting BOFF to one may generate an interrupt.
Figure 16-12. Line Error Mode
Note:
• Error active (default):
• Error passive:
• Bus off:
• BERR: Bit error. The bit value which is monitored is different from the bit value sent.
• SERR: Stuff error. Detection of more than five consecutive bit with the same polarity.
• CERR: CRC error (Rx only). The receiver performs a CRC check on every destuffed
• FERR: Form error. The form error results from one (or more) violations of the fixed form of
The CAN channel takes part in bus communication and can send an active error frame
when the CAN macro detects an error.
The CAN channel cannot send an active error frame. It takes part in bus communication,
but when an error is detected, a passive error frame is sent. Also, after a transmission, an
error passive unit will wait before initiating further transmission.
The CAN channel is not allowed to have any influence on the bus.
received message from the start of frame up to the data field. If this checking does not
match with the destuffed CRC field, an CRC error is set.
the following bit fields:
– CRC delimiter
– acknowledgement delimiter
Note:
More than one REC/TEC change may apply during a given message transfer.
Exceptions:
- Recessive bit sent monitored as dominant bit during the arbitration field and the
acknowledge slot.
- Detecting a dominant bit during the sending of an error frame.
ERRP = 1
BOFF = 0
Passive
Error
TEC > 127 or
REC > 127
Atmel ATmega16/32/64/M1/C1
ERRP = 0
BOFF = 0
TEC < 127 and
REC < 127
interrupt - BOFFIT
TEC > 255
Active
Error
Reset
ERRP = 0
BOFF = 1
of 11 consecutive
128 occurrences
recessive bit
Bus
Off
183

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