ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 221

• Manufacturer Part Number: ATMEGA64M1-15MZ
• Description: MCU AVR 64KB FLASH 3PSC 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64M1-15MZ

• Package / Case: 32-VQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Eeprom Size: 2K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Connectivity: CAN, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Lead Free Status / Rohs Status: Details

17.5.14
17.5.15
17.5.15.1
7647G–AVR–09/11
Message Filtering
Data Management
LIN FIFO Data Buffer
LINERR.6
LINERR.1
LINERR.7
LINERR.5
LINERR.4
LINERR.3
LINERR.2
LINERR.0
Figure 17-13. LIN Interrupt Mapping
Message filtering based upon the whole identifier is not implemented. Only a status for frame
headers having 0x3C, 0x3D, 0x3E and 0x3F as identifier is available in the LINSIR register.
Table 17-4.
The LIN protocol says that a message with an identifier from 60 (0x3C) up to 63 (0x3F) uses a
classic checksum (sum over the data bytes only). Software will be responsible for switching
correctly the LIN13 bit to provide/check this expected checksum (the insertion of the ID field in
the computation of the CRC is set - or not - just after entering the Rx or Tx Response
command).
To preserve register allocation, the LIN data buffer is seen as a FIFO (with address pointer
accessible). This FIFO is accessed via the LINDX[2..0] field of LINSEL register through the
LINDAT register.
LINDX[2..0], the data index, is the address pointer to the required data byte. The data byte can
be read or written. The data index is automatically incremented after each LINDAT access if
the LAINC (active low) bit is cleared. A roll-over is implemented, after data index=7 it is data
index=0. Otherwise, if LAINC bit is set, the data index needs to be written (updated) before
each LINDAT access.
The first byte of a LIN frame is stored at the data index=0, the second one at the data index=1,
and so on. Nevertheless, LINSEL must be initialized by the user before use.
LABORT
LTOERR
LOVERR
LCERR
LFERR
LSERR
LPERR
LBERR
Frame Status
LIDST[2..0]
100
101
110
111
0xx
b
b
b
b
b
LINSIR.3
LINSIR.2
LINSIR.1
LINSIR.0
LRXOK
LTXOK
LIDOK
LERR
Atmel ATmega16/32/64/M1/C1
LENERR
LINENIR.3
LENIDOK
LINENIR.2
LENTXOK
LINENIR.1
No specific identifier
60 (0x3C) identifier
61 (0x3D) identifier
62 (0x3E) identifier
63 (0x3F) identifier
Frame Status
LENRXOK
LINENIR.0
LIN ERR
LIN IT
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