ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 60

• Manufacturer Part Number: ATMEGA64M1-15MZ
• Description: MCU AVR 64KB FLASH 3PSC 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64M1-15MZ

• Package / Case: 32-VQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Eeprom Size: 2K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Connectivity: CAN, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Lead Free Status / Rohs Status: Details

8.1.1
8.1.2
60
Atmel ATmega16/32/64/M1/C1
Moving Interrupts Between Application and Boot Space
MCU Control Register – MCUCR
When the BOOTRST Fuse is programmed, the Boot section size set to 2K bytes and the
IVSEL bit in the MCUCR Register is set before any interrupts are enabled, the most typical
a n d g e n e r a l p r o g r a m s e t u p f o r t h e R e s e t a n d I n t e r r u p t V e c t o r A d d r e s s e s i n
ATmega16/32/64/M1/C116/32 is:
The MCU Control Register controls the placement of the Interrupt Vector table.
• Bit 1 – IVSEL: Interrupt Vector Select
When the IVSEL bit is cleared (zero), the Interrupt Vectors are placed at the start of the Flash
memory. When this bit is set (one), the Interrupt Vectors are moved to the beginning of the
Boot Loader section of the Flash. The actual address of the start of the Boot Flash Section is
determined by the BOOTSZ Fuses. Refer to the section
Read-While-Write Self-Programming ATmega16/32/64/M1/C1” on page 279
avoid unintentional changes of Interrupt Vector tables, a special write procedure must be fol-
lowed to change the IVSEL bit:
Bit
Read/Write
Initial Value
0xC02
0xC03
0xC04
0xC05
Address Labels Code
;
.org 0xC00
0xC00
0xC02
0xC04
...
0xC3C
;
0xC3E
0xC3F
0xC40
0xC41
0xC42
0xC43
1. Write the Interrupt Vector Change Enable (IVCE) bit to one.
2. Within four cycles, write the desired value to IVSEL while writing a zero to IVCE.
RESET: ldi
SPIPS
R/W
7
0
ldi
out
sei
<instr>
jmp
jmp
jmp
...
jmp
out
ldi
out
sei
<instr>
R
6
–
0
r16,low(RAMEND)
SPL,r16
RESET
ANA_COMP_0
ANA_COMP_1
...
SPM_RDY
r16,high(RAMEND); Main program start
SPH,r16
r16,low(RAMEND)
SPL,r16
xxx
xxx
R
5
–
0
PUD
R/W
4
0
; Enable interrupts
Comments
; Reset handler
; Analog Comparator 0 Handler
; Analog Comparator 1 Handler
;
; Store Program Memory Ready Handler
; Set Stack Pointer to top of RAM
; Enable interrupts
R
3
–
0
R
2
–
0
“Boot Loader Support –
IVSEL
R/W
1
0
IVCE
R/W
0
0
for details. To
7647G–AVR–09/11
MCUCR