ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 268

• Manufacturer Part Number: ATMEGA64M1-15MZ
• Description: MCU AVR 64KB FLASH 3PSC 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64M1-15MZ

• Package / Case: 32-VQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Eeprom Size: 2K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Connectivity: CAN, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Lead Free Status / Rohs Status: Details

20.4.5
268
Atmel ATmega16/32/64/M1/C1
Analog Comparator Status Register – ACSR
• Bit 2, 1, 0– AC3M2, AC3M1, AC3M0: Analog Comparator 3 Multiplexer register
These 3 bits determine the input of the negative input of the analog comparator.
The different setting are shown in
Table 20-8.
Bit
Read/Write
Initial Value
• Bit 7– AC3IF: Analog Comparator 3 Interrupt Flag Bit
This bit is set by hardware when comparator 3 output event triggers off the interrupt mode
defined by AC3IS1 and AC3IS0 bits in AC2CON register.
This bit is cleared by hardware when the corresponding interrupt vector is executed in case
the AC3IE in AC3CON register is set. Anyway, this bit is cleared by writing a logical one on it.
This bit can also be used to synchronize ADC or DAC conversions.
• Bit 6– AC2IF: Analog Comparator 2 Interrupt Flag Bit
This bit is set by hardware when comparator 2 output event triggers off the interrupt mode
defined by AC2IS1 and AC2IS0 bits in AC2CON register.
This bit is cleared by hardware when the corresponding interrupt vector is executed in case
the AC2IE in AC2CON register is set. Anyway, this bit is cleared by writing a logical one on it.
This bit can also be used to synchronize ADC or DAC conversions.
• Bit 5– AC1IF: Analog Comparator 1 Interrupt Flag Bit
This bit is set by hardware when comparator 1 output event triggers off the interrupt mode
defined by AC1IS1 and AC1IS0 bits in AC1CON register.
This bit is cleared by hardware when the corresponding interrupt vector is executed in case
the AC1IE in AC1CON register is set. Anyway, this bit is cleared by writing a logical one on it.
This bit can also be used to synchronize ADC or DAC conversions.
• Bit 4– AC0IF: Analog Comparator 0 Interrupt Flag Bit
This bit is set by hardware when comparator 0 output event triggers off the interrupt mode
defined by AC0IS1 and AC0IS0 bits in AC0CON register.
This bit is cleared by hardware when the corresponding interrupt vector is executed in case
AC3M2
0
0
0
0
1
1
1
1
Analog Comparator 3 negative input selection
AC3M1
0
0
1
1
0
0
1
1
AC3IF
R/W
7
0
AC2IF
R/W
6
0
AC3M0
0
1
0
1
0
1
0
1
AC1IF
R/W
Table
5
0
20-6.
AC0IF
R/W
Description
“Vref”/6.40
“Vref”/3.20
“Vref”/2.13
“Vref”/1.60
Bandgap (1.1V)
DAC result
Analog Comparator Negative Input (ACMPM pin)
Reserved
4
0
AC3O
R
3
0
AC2O
2
R
0
AC1O
R
1
0
AC0O
R
0
0
7647G–AVR–09/11
ACSR