ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 196

• Manufacturer Part Number: ATMEGA64M1-15MZ
• Description: MCU AVR 64KB FLASH 3PSC 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64M1-15MZ

• Package / Case: 32-VQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Eeprom Size: 2K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Connectivity: CAN, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Lead Free Status / Rohs Status: Details

16.10.17 CAN Page MOb Register - CANPAGE
16.11 MOb Registers
16.11.1
196
Atmel ATmega16/32/64/M1/C1
CAN MOb Status Register - CANSTMOB
• Bit 3:0 – CGP3:0: CAN General Purpose Bits
These bits can be pre-programmed to match with the wanted configuration of the CANPAGE
register (i.e., AINC and INDX2:0 setting).
• Bit 7:4 – MOBNB3:0: MOb Number
Selection of the MOb number, the available numbers are from 0 to 5.
Note:
• Bit 3 – AINC: Auto Increment of the FIFO CAN Data Buffer Index (Active Low)
• Bit 2:0 – INDX2:0: FIFO CAN Data Buffer Index
Byte location of the CAN data byte into the FIFO for the defined MOb.
The MOb registers has no initial (default) value after RESET.
• Bit 7 – DLCW: Data Length Code Warning
The incoming message does not have the DLC expected. Whatever the frame type, the DLC
field of the CANCDMOB register is updated by the received DLC.
• Bit 6 – TXOK: Transmit OK
This flag can generate an interrupt. It must be cleared using a read-modify-write software rou-
tine on the whole CANSTMOB register.
The communication enabled by transmission is completed. TxOK rises at the end of EOF field.
When the controller is ready to send a frame, if two or more message objects are enabled as
producers, the lower MOb index (0 to 14) is supplied first.
• Bit 5 – RXOK: Receive OK
This flag can generate an interrupt. It must be cleared using a read-modify-write software rou-
tine on the whole CANSTMOB register.
The communication enabled by reception is completed. RxOK rises at the end of the 6
EOF field. In case of two or more message object reception hits, the lower MOb index (0 to 14)
is updated first.
Initial Value
Initial Value
Read/Write
Read/Write
Bit
– 0 - auto increment of the index (default value).
– 1- no auto increment of the index.
Bit
MOBNB3 always must be written to zero for compatibility with all AVR CAN devices.
MOBNB3
DLCW
R/W
R/W
7
7
0
-
MOBNB2
TXOK
R/W
R/W
6
6
0
-
MOBNB1
RXOK
R/W
R/W
5
-
5
0
MOBNB0
BERR
R/W
R/W
4
-
4
0
SERR
R/W
AINC
R/W
3
-
3
0
CERR
INDX2
R/W
R/W
2
-
2
0
FERR
R/W
INDX1
R/W
1
-
1
0
AERR
R/W
INDX0
R/W
0
-
0
0
7647G–AVR–09/11
CANSTMOB
CANPAGE
th
bit of